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-rw-r--r--dts/Bindings/ata/ahci-platform.txt1
-rw-r--r--dts/Bindings/ata/imx-sata.txt1
-rw-r--r--dts/Bindings/ata/nvidia,tegra124-ahci.txt36
3 files changed, 26 insertions, 12 deletions
diff --git a/dts/Bindings/ata/ahci-platform.txt b/dts/Bindings/ata/ahci-platform.txt
index c760ecb813..f4006d3c9f 100644
--- a/dts/Bindings/ata/ahci-platform.txt
+++ b/dts/Bindings/ata/ahci-platform.txt
@@ -30,6 +30,7 @@ compatible:
Optional properties:
- dma-coherent : Present if dma operations are coherent
- clocks : a list of phandle + clock specifier pairs
+- resets : a list of phandle + reset specifier pairs
- target-supply : regulator for SATA target power
- phys : reference to the SATA PHY node
- phy-names : must be "sata-phy"
diff --git a/dts/Bindings/ata/imx-sata.txt b/dts/Bindings/ata/imx-sata.txt
index a3d14719e4..781f887517 100644
--- a/dts/Bindings/ata/imx-sata.txt
+++ b/dts/Bindings/ata/imx-sata.txt
@@ -7,6 +7,7 @@ Required properties:
- compatible : should be one of the following:
- "fsl,imx53-ahci" for i.MX53 SATA controller
- "fsl,imx6q-ahci" for i.MX6Q SATA controller
+ - "fsl,imx6qp-ahci" for i.MX6QP SATA controller
- interrupts : interrupt mapping for SATA IRQ
- reg : registers mapping
- clocks : list of clock specifiers, must contain an entry for each
diff --git a/dts/Bindings/ata/nvidia,tegra124-ahci.txt b/dts/Bindings/ata/nvidia,tegra124-ahci.txt
index 66c83c3e89..12ab2f723e 100644
--- a/dts/Bindings/ata/nvidia,tegra124-ahci.txt
+++ b/dts/Bindings/ata/nvidia,tegra124-ahci.txt
@@ -1,9 +1,10 @@
-Tegra124 SoC SATA AHCI controller
+Tegra SoC SATA AHCI controller
Required properties :
-- compatible : For Tegra124, must contain "nvidia,tegra124-ahci". Otherwise,
- must contain '"nvidia,<chip>-ahci", "nvidia,tegra124-ahci"', where <chip>
- is tegra132.
+- compatible : Must be one of:
+ - Tegra124 : "nvidia,tegra124-ahci"
+ - Tegra132 : "nvidia,tegra132-ahci", "nvidia,tegra124-ahci"
+ - Tegra210 : "nvidia,tegra210-ahci"
- reg : Should contain 2 entries:
- AHCI register set (SATA BAR5)
- SATA register set
@@ -13,8 +14,6 @@ Required properties :
- clock-names : Must include the following entries:
- sata
- sata-oob
- - cml1
- - pll_e
- resets : Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names : Must include the following entries:
@@ -24,9 +23,22 @@ Required properties :
- phys : Must contain an entry for each entry in phy-names.
See ../phy/phy-bindings.txt for details.
- phy-names : Must include the following entries:
- - sata-phy : XUSB PADCTL SATA PHY
-- hvdd-supply : Defines the SATA HVDD regulator
-- vddio-supply : Defines the SATA VDDIO regulator
-- avdd-supply : Defines the SATA AVDD regulator
-- target-5v-supply : Defines the SATA 5V power regulator
-- target-12v-supply : Defines the SATA 12V power regulator
+ - For Tegra124 and Tegra132:
+ - sata-phy : XUSB PADCTL SATA PHY
+- For Tegra124 and Tegra132:
+ - hvdd-supply : Defines the SATA HVDD regulator
+ - vddio-supply : Defines the SATA VDDIO regulator
+ - avdd-supply : Defines the SATA AVDD regulator
+ - target-5v-supply : Defines the SATA 5V power regulator
+ - target-12v-supply : Defines the SATA 12V power regulator
+
+Optional properties:
+- reg :
+ - AUX register set
+- clock-names :
+ - cml1 :
+ cml1 clock should be defined here if the PHY driver
+ doesn't manage them. If it does, they should not be.
+- phy-names :
+ - For T210:
+ - sata-phy