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-rw-r--r--dts/Bindings/board/fsl-board.txt1
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diff --git a/dts/Bindings/board/fsl-board.txt b/dts/Bindings/board/fsl-board.txt
index fb7b03e..eb52f6b 100644
--- a/dts/Bindings/board/fsl-board.txt
+++ b/dts/Bindings/board/fsl-board.txt
@@ -29,7 +29,6 @@ Required properties:
- reg: should contain the address and the length of the FPGA register set.
Optional properties:
-- interrupt-parent: should specify phandle for the interrupt controller.
- interrupts: should specify event (wakeup) IRQ.
Example (P1022DS):