summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/clock/axs10x-i2s-pll-clock.txt
diff options
context:
space:
mode:
Diffstat (limited to 'dts/Bindings/clock/axs10x-i2s-pll-clock.txt')
-rw-r--r--dts/Bindings/clock/axs10x-i2s-pll-clock.txt25
1 files changed, 25 insertions, 0 deletions
diff --git a/dts/Bindings/clock/axs10x-i2s-pll-clock.txt b/dts/Bindings/clock/axs10x-i2s-pll-clock.txt
new file mode 100644
index 0000000000..5ffc8df7e6
--- /dev/null
+++ b/dts/Bindings/clock/axs10x-i2s-pll-clock.txt
@@ -0,0 +1,25 @@
+Binding for the AXS10X I2S PLL clock
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible: shall be "snps,axs10x-i2s-pll-clock"
+- reg : address and length of the I2S PLL register set.
+- clocks: shall be the input parent clock phandle for the PLL.
+- #clock-cells: from common clock binding; Should always be set to 0.
+
+Example:
+ pll_clock: pll_clock {
+ compatible = "fixed-clock";
+ clock-frequency = <27000000>;
+ #clock-cells = <0>;
+ };
+
+ i2s_clock@100a0 {
+ compatible = "snps,axs10x-i2s-pll-clock";
+ reg = <0x100a0 0x10>;
+ clocks = <&pll_clock>;
+ #clock-cells = <0>;
+ };