diff options
Diffstat (limited to 'dts/Bindings/clock/st/st,clkgen-prediv.txt')
| -rw-r--r-- | dts/Bindings/clock/st/st,clkgen-prediv.txt | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/dts/Bindings/clock/st/st,clkgen-prediv.txt b/dts/Bindings/clock/st/st,clkgen-prediv.txt new file mode 100644 index 0000000000..566c9d79ed --- /dev/null +++ b/dts/Bindings/clock/st/st,clkgen-prediv.txt @@ -0,0 +1,36 @@ +Binding for a ST pre-divider clock driver. + +This binding uses the common clock binding[1]. +Base address is located to the parent node. See clock binding[2] + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt +[2] Documentation/devicetree/bindings/clock/st/st,clkgen.txt + +Required properties: + +- compatible : shall be: + "st,clkgena-prediv-c65", "st,clkgena-prediv" + "st,clkgena-prediv-c32", "st,clkgena-prediv" + +- #clock-cells : From common clock binding; shall be set to 0. + +- clocks : From common clock binding + +- clock-output-names : From common clock binding. + +Example: + + clockgenA@fd345000 { + reg = <0xfd345000 0xb50>; + + CLK_M_A2_OSC_PREDIV: CLK_M_A2_OSC_PREDIV { + #clock-cells = <0>; + compatible = "st,clkgena-prediv-c32", + "st,clkgena-prediv"; + + clocks = <&CLK_SYSIN>; + + clock-output-names = "CLK_M_A2_OSC_PREDIV"; + }; + }; + |