diff options
Diffstat (limited to 'dts/Bindings/display/bridge')
| -rw-r--r-- | dts/Bindings/display/bridge/cdns,mhdp8546.yaml | 169 | ||||
| -rw-r--r-- | dts/Bindings/display/bridge/ite,it6505.yaml | 5 | ||||
| -rw-r--r-- | dts/Bindings/display/bridge/lontium,lt9611.yaml | 176 | ||||
| -rw-r--r-- | dts/Bindings/display/bridge/lvds-codec.yaml | 6 | ||||
| -rw-r--r-- | dts/Bindings/display/bridge/nwl-dsi.yaml | 15 | ||||
| -rw-r--r-- | dts/Bindings/display/bridge/renesas,dw-hdmi.txt | 4 | ||||
| -rw-r--r-- | dts/Bindings/display/bridge/renesas,lvds.yaml | 2 | ||||
| -rw-r--r-- | dts/Bindings/display/bridge/snps,dw-mipi-dsi.yaml | 2 | ||||
| -rw-r--r-- | dts/Bindings/display/bridge/toshiba,tc358762.yaml | 127 | ||||
| -rw-r--r-- | dts/Bindings/display/bridge/toshiba,tc358775.yaml | 215 |
10 files changed, 714 insertions, 7 deletions
diff --git a/dts/Bindings/display/bridge/cdns,mhdp8546.yaml b/dts/Bindings/display/bridge/cdns,mhdp8546.yaml new file mode 100644 index 0000000000..74d675fc6e --- /dev/null +++ b/dts/Bindings/display/bridge/cdns,mhdp8546.yaml @@ -0,0 +1,169 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Cadence MHDP8546 bridge + +maintainers: + - Swapnil Jakhade <sjakhade@cadence.com> + - Yuti Amonkar <yamonkar@cadence.com> + +properties: + compatible: + enum: + - cdns,mhdp8546 + - ti,j721e-mhdp8546 + + reg: + minItems: 1 + maxItems: 2 + items: + - description: + Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P). + The AUX and PMA registers are not part of this range, they are instead + included in the associated PHY. + - description: + Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs. + + reg-names: + minItems: 1 + maxItems: 2 + items: + - const: mhdptx + - const: j721e-intg + + clocks: + maxItems: 1 + description: + DP bridge clock, used by the IP to know how to translate a number of + clock cycles into a time (which is used to comply with DP standard timings + and delays). + + phys: + maxItems: 1 + description: + phandle to the DisplayPort PHY. + + phy-names: + items: + - const: dpphy + + power-domains: + maxItems: 1 + + interrupts: + maxItems: 1 + + ports: + type: object + description: + Ports as described in Documentation/devicetree/bindings/graph.txt. + + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + port@0: + type: object + description: + First input port representing the DP bridge input. + + port@1: + type: object + description: + Second input port representing the DP bridge input. + + port@2: + type: object + description: + Third input port representing the DP bridge input. + + port@3: + type: object + description: + Fourth input port representing the DP bridge input. + + port@4: + type: object + description: + Output port representing the DP bridge output. + + required: + - port@0 + - port@4 + - '#address-cells' + - '#size-cells' + +allOf: + - if: + properties: + compatible: + contains: + const: ti,j721e-mhdp8546 + then: + properties: + reg: + minItems: 2 + reg-names: + minItems: 2 + else: + properties: + reg: + maxItems: 1 + reg-names: + maxItems: 1 + +required: + - compatible + - clocks + - reg + - reg-names + - phys + - phy-names + - interrupts + - ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + bus { + #address-cells = <2>; + #size-cells = <2>; + + mhdp: dp-bridge@f0fb000000 { + compatible = "cdns,mhdp8546"; + reg = <0xf0 0xfb000000 0x0 0x1000000>; + reg-names = "mhdptx"; + clocks = <&mhdp_clock>; + phys = <&dp_phy>; + phy-names = "dpphy"; + interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dp_bridge_input: endpoint { + remote-endpoint = <&xxx_dpi_output>; + }; + }; + + port@4 { + reg = <4>; + dp_bridge_output: endpoint { + remote-endpoint = <&xxx_dp_connector_input>; + }; + }; + }; + }; + }; +... diff --git a/dts/Bindings/display/bridge/ite,it6505.yaml b/dts/Bindings/display/bridge/ite,it6505.yaml index 2c500166c6..efbb3d0117 100644 --- a/dts/Bindings/display/bridge/ite,it6505.yaml +++ b/dts/Bindings/display/bridge/ite,it6505.yaml @@ -31,6 +31,9 @@ properties: compatible: const: ite,it6505 + reg: + maxItems: 1 + ovdd-supply: maxItems: 1 description: I/O voltage @@ -63,6 +66,8 @@ required: - reset-gpios - extcon +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/dts/Bindings/display/bridge/lontium,lt9611.yaml b/dts/Bindings/display/bridge/lontium,lt9611.yaml new file mode 100644 index 0000000000..d602083592 --- /dev/null +++ b/dts/Bindings/display/bridge/lontium,lt9611.yaml @@ -0,0 +1,176 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/lontium,lt9611.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lontium LT9611 2 Port MIPI to HDMI Bridge + +maintainers: + - Vinod Koul <vkoul@kernel.org> + +description: | + The LT9611 is a bridge device which converts DSI to HDMI + +properties: + compatible: + enum: + - lontium,lt9611 + + reg: + maxItems: 1 + + "#sound-dai-cells": + const: 1 + + interrupts: + maxItems: 1 + + reset-gpios: + maxItems: 1 + description: GPIO connected to active high RESET pin. + + vdd-supply: + description: Regulator for 1.8V MIPI phy power. + + vcc-supply: + description: Regulator for 3.3V IO power. + + ports: + type: object + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: | + Primary MIPI port-1 for MIPI input + + properties: + reg: + const: 0 + + patternProperties: + "^endpoint(@[0-9])$": + type: object + additionalProperties: false + + properties: + remote-endpoint: + $ref: /schemas/types.yaml#/definitions/phandle + + required: + - reg + + port@1: + type: object + description: | + Additional MIPI port-2 for MIPI input, used in combination + with primary MIPI port-1 to drive higher resolution displays + + properties: + reg: + const: 1 + + patternProperties: + "^endpoint(@[0-9])$": + type: object + additionalProperties: false + + properties: + remote-endpoint: + $ref: /schemas/types.yaml#/definitions/phandle + + required: + - reg + + port@2: + type: object + description: | + HDMI port for HDMI output + + properties: + reg: + const: 2 + + patternProperties: + "^endpoint(@[0-9])$": + type: object + additionalProperties: false + + properties: + remote-endpoint: + $ref: /schemas/types.yaml#/definitions/phandle + + required: + - reg + + required: + - "#address-cells" + - "#size-cells" + - port@0 + - port@2 + +required: + - compatible + - reg + - interrupts + - vdd-supply + - vcc-supply + - ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i2c10 { + #address-cells = <1>; + #size-cells = <0>; + + hdmi-bridge@3b { + compatible = "lontium,lt9611"; + reg = <0x3b>; + + reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; + interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; + + vdd-supply = <<9611_1v8>; + vcc-supply = <<9611_3v3>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lt9611_a: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + lt9611_b: endpoint { + remote-endpoint = <&dsi1_out>; + }; + }; + + port@2 { + reg = <2>; + lt9611_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; + }; + +... diff --git a/dts/Bindings/display/bridge/lvds-codec.yaml b/dts/Bindings/display/bridge/lvds-codec.yaml index 68951d56eb..e5e3c72630 100644 --- a/dts/Bindings/display/bridge/lvds-codec.yaml +++ b/dts/Bindings/display/bridge/lvds-codec.yaml @@ -79,10 +79,16 @@ properties: The GPIO used to control the power down line of this device. maxItems: 1 + power-supply: + maxItems: 1 + required: - compatible - ports +additionalProperties: false + + examples: - | lvds-encoder { diff --git a/dts/Bindings/display/bridge/nwl-dsi.yaml b/dts/Bindings/display/bridge/nwl-dsi.yaml index 04099f5bea..a125b2dd3a 100644 --- a/dts/Bindings/display/bridge/nwl-dsi.yaml +++ b/dts/Bindings/display/bridge/nwl-dsi.yaml @@ -14,6 +14,9 @@ description: | NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for the SOCs NWL MIPI-DSI host controller. +allOf: + - $ref: ../dsi-controller.yaml# + properties: compatible: const: fsl,imx8mq-nwl-dsi @@ -30,6 +33,10 @@ properties: '#size-cells': const: 0 + assigned-clock-parents: true + assigned-clock-rates: true + assigned-clocks: true + clocks: items: - description: DSI core clock @@ -140,10 +147,6 @@ properties: additionalProperties: false -patternProperties: - "^panel@[0-9]+$": - type: object - required: - '#address-cells' - '#size-cells' @@ -159,7 +162,7 @@ required: - reset-names - resets -additionalProperties: false +unevaluatedProperties: false examples: - | @@ -168,7 +171,7 @@ examples: #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/reset/imx8mq-reset.h> - mipi_dsi: mipi_dsi@30a00000 { + dsi@30a00000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx8mq-nwl-dsi"; diff --git a/dts/Bindings/display/bridge/renesas,dw-hdmi.txt b/dts/Bindings/display/bridge/renesas,dw-hdmi.txt index 819f3e3101..3f60726511 100644 --- a/dts/Bindings/display/bridge/renesas,dw-hdmi.txt +++ b/dts/Bindings/display/bridge/renesas,dw-hdmi.txt @@ -14,8 +14,10 @@ Required properties: - compatible : Shall contain one or more of - "renesas,r8a774a1-hdmi" for R8A774A1 (RZ/G2M) compatible HDMI TX - "renesas,r8a774b1-hdmi" for R8A774B1 (RZ/G2N) compatible HDMI TX + - "renesas,r8a774e1-hdmi" for R8A774E1 (RZ/G2H) compatible HDMI TX - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX + - "renesas,r8a77961-hdmi" for R8A77961 (R-Car M3-W+) compatible HDMI TX - "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX - "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 and RZ/G2 compatible HDMI TX @@ -42,7 +44,7 @@ Optional properties: Example: hdmi0: hdmi@fead0000 { - compatible = "renesas,r8a7795-dw-hdmi"; + compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; reg = <0 0xfead0000 0 0x10000>; interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>; diff --git a/dts/Bindings/display/bridge/renesas,lvds.yaml b/dts/Bindings/display/bridge/renesas,lvds.yaml index baaf2a2a6f..e5b163951b 100644 --- a/dts/Bindings/display/bridge/renesas,lvds.yaml +++ b/dts/Bindings/display/bridge/renesas,lvds.yaml @@ -16,11 +16,13 @@ description: | properties: compatible: enum: + - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders - renesas,r8a7744-lvds # for RZ/G1N compatible LVDS encoders - renesas,r8a774a1-lvds # for RZ/G2M compatible LVDS encoders - renesas,r8a774b1-lvds # for RZ/G2N compatible LVDS encoders - renesas,r8a774c0-lvds # for RZ/G2E compatible LVDS encoders + - renesas,r8a774e1-lvds # for RZ/G2H compatible LVDS encoders - renesas,r8a7790-lvds # for R-Car H2 compatible LVDS encoders - renesas,r8a7791-lvds # for R-Car M2-W compatible LVDS encoders - renesas,r8a7793-lvds # for R-Car M2-N compatible LVDS encoders diff --git a/dts/Bindings/display/bridge/snps,dw-mipi-dsi.yaml b/dts/Bindings/display/bridge/snps,dw-mipi-dsi.yaml index 012aa8e7cb..e42cb610f5 100644 --- a/dts/Bindings/display/bridge/snps,dw-mipi-dsi.yaml +++ b/dts/Bindings/display/bridge/snps,dw-mipi-dsi.yaml @@ -66,3 +66,5 @@ required: - clocks - ports - reg + +additionalProperties: true diff --git a/dts/Bindings/display/bridge/toshiba,tc358762.yaml b/dts/Bindings/display/bridge/toshiba,tc358762.yaml new file mode 100644 index 0000000000..195025e680 --- /dev/null +++ b/dts/Bindings/display/bridge/toshiba,tc358762.yaml @@ -0,0 +1,127 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358762.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba TC358762 MIPI DSI to MIPI DPI bridge + +maintainers: + - Marek Vasut <marex@denx.de> + +description: | + The TC358762 is bridge device which converts MIPI DSI to MIPI DPI. + +properties: + compatible: + enum: + - toshiba,tc358762 + + reg: + maxItems: 1 + description: virtual channel number of a DSI peripheral + + vddc-supply: + description: Regulator for 1.2V internal core power. + + ports: + type: object + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + additionalProperties: false + + description: | + Video port for MIPI DSI input + + properties: + reg: + const: 0 + + patternProperties: + endpoint: + type: object + additionalProperties: false + + properties: + remote-endpoint: true + + required: + - reg + + port@1: + type: object + additionalProperties: false + + description: | + Video port for MIPI DPI output (panel or connector). + + properties: + reg: + const: 1 + + patternProperties: + endpoint: + type: object + additionalProperties: false + + properties: + remote-endpoint: true + + required: + - reg + + required: + - "#address-cells" + - "#size-cells" + - port@0 + - port@1 + +required: + - compatible + - reg + - vddc-supply + - ports + +additionalProperties: false + +examples: + - | + i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + bridge@0 { + reg = <0>; + compatible = "toshiba,tc358762"; + vddc-supply = <&vcc_1v2_reg>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + bridge_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + + port@1 { + reg = <1>; + bridge_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; + }; + +... diff --git a/dts/Bindings/display/bridge/toshiba,tc358775.yaml b/dts/Bindings/display/bridge/toshiba,tc358775.yaml new file mode 100644 index 0000000000..31f085d8ab --- /dev/null +++ b/dts/Bindings/display/bridge/toshiba,tc358775.yaml @@ -0,0 +1,215 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358775.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba TC358775 DSI to LVDS bridge bindings + +maintainers: + - Vinay Simha BN <simhavcs@gmail.com> + +description: | + This binding supports DSI to LVDS bridge TC358775 + + MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane. + Video frame size: + Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel + limited by 135 MHz LVDS speed + Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display + panel, limited by 270 MHz LVDS speed. + +properties: + compatible: + const: toshiba,tc358775 + + reg: + maxItems: 1 + description: i2c address of the bridge, 0x0f + + vdd-supply: + maxItems: 1 + description: 1.2V LVDS Power Supply + + vddio-supply: + maxItems: 1 + description: 1.8V IO Power Supply + + stby-gpios: + maxItems: 1 + description: Standby pin, Low active + + reset-gpios: + maxItems: 1 + description: Hardware reset, Low active + + ports: + type: object + description: + A node containing input and output port nodes with endpoint definitions + as documented in + Documentation/devicetree/bindings/media/video-interfaces.txt + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: | + DSI Input. The remote endpoint phandle should be a + reference to a valid mipi_dsi_host device node. + + port@1: + type: object + description: | + Video port for LVDS output (panel or connector). + + port@2: + type: object + description: | + Video port for Dual link LVDS output (panel or connector). + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - vdd-supply + - vddio-supply + - stby-gpios + - reset-gpios + - ports + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + /* For single-link LVDS display panel */ + + i2c@78b8000 { + /* On High speed expansion */ + label = "HS-I2C2"; + reg = <0x078b8000 0x500>; + clock-frequency = <400000>; /* fastmode operation */ + #address-cells = <1>; + #size-cells = <0>; + + tc_bridge: bridge@f { + compatible = "toshiba,tc358775"; + reg = <0x0f>; + + vdd-supply = <&pm8916_l2>; + vddio-supply = <&pm8916_l6>; + + stby-gpios = <&msmgpio 99 GPIO_ACTIVE_LOW>; + reset-gpios = <&msmgpio 72 GPIO_ACTIVE_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + d2l_in_test: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + lvds_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; + }; + + dsi@1a98000 { + reg = <0x1a98000 0x25c>; + reg-names = "dsi_ctrl"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@1 { + reg = <1>; + dsi0_out: endpoint { + remote-endpoint = <&d2l_in_test>; + data-lanes = <0 1 2 3>; + }; + }; + }; + }; + + - | + /* For dual-link LVDS display panel */ + + i2c@78b8000 { + /* On High speed expansion */ + label = "HS-I2C2"; + reg = <0x078b8000 0x500>; + clock-frequency = <400000>; /* fastmode operation */ + #address-cells = <1>; + #size-cells = <0>; + + tc_bridge_dual: bridge@f { + compatible = "toshiba,tc358775"; + reg = <0x0f>; + + vdd-supply = <&pm8916_l2>; + vddio-supply = <&pm8916_l6>; + + stby-gpios = <&msmgpio 99 GPIO_ACTIVE_LOW>; + reset-gpios = <&msmgpio 72 GPIO_ACTIVE_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + d2l_in_dual: endpoint { + remote-endpoint = <&dsi0_out_dual>; + }; + }; + + port@1 { + reg = <1>; + lvds0_out: endpoint { + remote-endpoint = <&panel_in0>; + }; + }; + + port@2 { + reg = <2>; + lvds1_out: endpoint { + remote-endpoint = <&panel_in1>; + }; + }; + }; + }; + }; + + dsi@1a98000 { + reg = <0x1a98000 0x25c>; + reg-names = "dsi_ctrl"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@1 { + reg = <1>; + dsi0_out_dual: endpoint { + remote-endpoint = <&d2l_in_dual>; + data-lanes = <0 1 2 3>; + }; + }; + }; + }; +... |