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-rw-r--r--dts/Bindings/display/zte,vou.txt21
1 files changed, 21 insertions, 0 deletions
diff --git a/dts/Bindings/display/zte,vou.txt b/dts/Bindings/display/zte,vou.txt
index 9c35628423..38476475fd 100644
--- a/dts/Bindings/display/zte,vou.txt
+++ b/dts/Bindings/display/zte,vou.txt
@@ -58,6 +58,18 @@ Required properties:
integer cells. The first cell is the offset of SYSCTRL register used
to control TV Encoder DAC power, and the second cell is the bit mask.
+* VGA output device
+
+Required properties:
+ - compatible: should be "zte,zx296718-vga"
+ - reg: Physical base address and length of the VGA device IO region
+ - interrupts : VGA interrupt number to CPU
+ - clocks: Phandle with clock-specifier pointing to VGA I2C clock.
+ - clock-names: Must be "i2c_wclk".
+ - zte,vga-power-control: the phandle to SYSCTRL block followed by two
+ integer cells. The first cell is the offset of SYSCTRL register used
+ to control VGA DAC power, and the second cell is the bit mask.
+
Example:
vou: vou@1440000 {
@@ -81,6 +93,15 @@ vou: vou@1440000 {
"main_wclk", "aux_wclk";
};
+ vga: vga@8000 {
+ compatible = "zte,zx296718-vga";
+ reg = <0x8000 0x1000>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&topcrm VGA_I2C_WCLK>;
+ clock-names = "i2c_wclk";
+ zte,vga-power-control = <&sysctrl 0x170 0xe0>;
+ };
+
hdmi: hdmi@c000 {
compatible = "zte,zx296718-hdmi";
reg = <0xc000 0x4000>;