summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
diff options
context:
space:
mode:
Diffstat (limited to 'dts/Bindings/fpga/altera-socfpga-a10-fpga-mgr.txt')
-rw-r--r--dts/Bindings/fpga/altera-socfpga-a10-fpga-mgr.txt19
1 files changed, 19 insertions, 0 deletions
diff --git a/dts/Bindings/fpga/altera-socfpga-a10-fpga-mgr.txt b/dts/Bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
new file mode 100644
index 0000000..2fd8e7a
--- /dev/null
+++ b/dts/Bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
@@ -0,0 +1,19 @@
+Altera SOCFPGA Arria10 FPGA Manager
+
+Required properties:
+- compatible : should contain "altr,socfpga-a10-fpga-mgr"
+- reg : base address and size for memory mapped io.
+ - The first index is for FPGA manager register access.
+ - The second index is for writing FPGA configuration data.
+- resets : Phandle and reset specifier for the device's reset.
+- clocks : Clocks used by the device.
+
+Example:
+
+ fpga_mgr: fpga-mgr@ffd03000 {
+ compatible = "altr,socfpga-a10-fpga-mgr";
+ reg = <0xffd03000 0x100
+ 0xffcfe400 0x20>;
+ clocks = <&l4_mp_clk>;
+ resets = <&rst FPGAMGR_RESET>;
+ };