summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/gpio
diff options
context:
space:
mode:
Diffstat (limited to 'dts/Bindings/gpio')
-rw-r--r--dts/Bindings/gpio/gateworks,pld-gpio.txt20
-rw-r--r--dts/Bindings/gpio/gpio-eic-sprd.txt4
-rw-r--r--dts/Bindings/gpio/gpio-pca953x.txt1
-rw-r--r--dts/Bindings/gpio/gpio.txt12
-rw-r--r--dts/Bindings/gpio/intel,ixp4xx-gpio.txt38
5 files changed, 73 insertions, 2 deletions
diff --git a/dts/Bindings/gpio/gateworks,pld-gpio.txt b/dts/Bindings/gpio/gateworks,pld-gpio.txt
new file mode 100644
index 0000000..6e81f8b
--- /dev/null
+++ b/dts/Bindings/gpio/gateworks,pld-gpio.txt
@@ -0,0 +1,20 @@
+Gateworks PLD GPIO controller bindings
+
+The GPIO controller should be a child node on an I2C bus,
+see: i2c/i2c.txt for details.
+
+Required properties:
+- compatible: Should be "gateworks,pld-gpio"
+- reg: I2C slave address
+- gpio-controller: Marks the device node as a GPIO controller.
+- #gpio-cells: Should be <2>. The first cell is the gpio number and
+ the second cell is used to specify optional parameters.
+
+Example:
+
+pld@56 {
+ compatible = "gateworks,pld-gpio";
+ reg = <0x56>;
+ gpio-controller;
+ #gpio-cells = <2>;
+};
diff --git a/dts/Bindings/gpio/gpio-eic-sprd.txt b/dts/Bindings/gpio/gpio-eic-sprd.txt
index 93d98d0..54040a2 100644
--- a/dts/Bindings/gpio/gpio-eic-sprd.txt
+++ b/dts/Bindings/gpio/gpio-eic-sprd.txt
@@ -33,7 +33,7 @@ Required properties:
"sprd,sc9860-eic-latch",
"sprd,sc9860-eic-async",
"sprd,sc9860-eic-sync",
- "sprd,sc27xx-eic".
+ "sprd,sc2731-eic".
- reg: Define the base and range of the I/O address space containing
the GPIO controller registers.
- gpio-controller: Marks the device node as a GPIO controller.
@@ -86,7 +86,7 @@ Example:
};
pmic_eic: gpio@300 {
- compatible = "sprd,sc27xx-eic";
+ compatible = "sprd,sc2731-eic";
reg = <0x300>;
interrupt-parent = <&sc2731_pmic>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/dts/Bindings/gpio/gpio-pca953x.txt b/dts/Bindings/gpio/gpio-pca953x.txt
index 4e3c550..fb144e2 100644
--- a/dts/Bindings/gpio/gpio-pca953x.txt
+++ b/dts/Bindings/gpio/gpio-pca953x.txt
@@ -16,6 +16,7 @@ Required properties:
nxp,pca9574
nxp,pca9575
nxp,pca9698
+ nxp,pcal6416
nxp,pcal6524
nxp,pcal9555a
maxim,max7310
diff --git a/dts/Bindings/gpio/gpio.txt b/dts/Bindings/gpio/gpio.txt
index f0ba154..a8895d3 100644
--- a/dts/Bindings/gpio/gpio.txt
+++ b/dts/Bindings/gpio/gpio.txt
@@ -67,6 +67,18 @@ Optional standard bitfield specifiers for the last cell:
https://en.wikipedia.org/wiki/Open_collector
- Bit 3: 0 means the output should be maintained during sleep/low-power mode
1 means the output state can be lost during sleep/low-power mode
+- Bit 4: 0 means no pull-up resistor should be enabled
+ 1 means a pull-up resistor should be enabled
+ This setting only applies to hardware with a simple on/off
+ control for pull-up configuration. If the hardware has more
+ elaborate pull-up configuration, it should be represented
+ using a pin control binding.
+- Bit 5: 0 means no pull-down resistor should be enabled
+ 1 means a pull-down resistor should be enabled
+ This setting only applies to hardware with a simple on/off
+ control for pull-down configuration. If the hardware has more
+ elaborate pull-down configuration, it should be represented
+ using a pin control binding.
1.1) GPIO specifier best practices
----------------------------------
diff --git a/dts/Bindings/gpio/intel,ixp4xx-gpio.txt b/dts/Bindings/gpio/intel,ixp4xx-gpio.txt
new file mode 100644
index 0000000..8dc41ed
--- /dev/null
+++ b/dts/Bindings/gpio/intel,ixp4xx-gpio.txt
@@ -0,0 +1,38 @@
+Intel IXP4xx XScale Networking Processors GPIO
+
+This GPIO controller is found in the Intel IXP4xx processors.
+It supports 16 GPIO lines.
+
+The interrupt portions of the GPIO controller is hierarchical:
+the synchronous edge detector is part of the GPIO block, but the
+actual enabling/disabling of the interrupt line is done in the
+main IXP4xx interrupt controller which has a 1:1 mapping for
+the first 12 GPIO lines to 12 system interrupts.
+
+The remaining 4 GPIO lines can not be used for receiving
+interrupts.
+
+The interrupt parent of this GPIO controller must be the
+IXP4xx interrupt controller.
+
+Required properties:
+
+- compatible : Should be
+ "intel,ixp4xx-gpio"
+- reg : Should contain registers location and length
+- gpio-controller : marks this as a GPIO controller
+- #gpio-cells : Should be 2, see gpio/gpio.txt
+- interrupt-controller : marks this as an interrupt controller
+- #interrupt-cells : a standard two-cell interrupt, see
+ interrupt-controller/interrupts.txt
+
+Example:
+
+gpio0: gpio@c8004000 {
+ compatible = "intel,ixp4xx-gpio";
+ reg = <0xc8004000 0x1000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+};