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-rw-r--r--dts/Bindings/gpio/gpio-atlas7.txt50
-rw-r--r--dts/Bindings/gpio/gpio-davinci.txt1
-rw-r--r--dts/Bindings/gpio/gpio-pca95xx.yaml4
-rw-r--r--dts/Bindings/gpio/gpio-stericsson-coh901.txt7
-rw-r--r--dts/Bindings/gpio/mrvl-gpio.yaml3
-rw-r--r--dts/Bindings/gpio/mstar,msc313-gpio.yaml2
-rw-r--r--dts/Bindings/gpio/renesas,rcar-gpio.yaml3
-rw-r--r--dts/Bindings/gpio/sifive,gpio.yaml29
-rw-r--r--dts/Bindings/gpio/toshiba,gpio-visconti.yaml70
-rw-r--r--dts/Bindings/gpio/zx296702-gpio.txt24
10 files changed, 104 insertions, 89 deletions
diff --git a/dts/Bindings/gpio/gpio-atlas7.txt b/dts/Bindings/gpio/gpio-atlas7.txt
deleted file mode 100644
index d7e123fc90..0000000000
--- a/dts/Bindings/gpio/gpio-atlas7.txt
+++ /dev/null
@@ -1,50 +0,0 @@
-CSR SiRFatlas7 GPIO controller bindings
-
-Required properties:
-- compatible : "sirf,atlas7-gpio"
-- reg : Address range of the pinctrl registers
-- interrupts : Interrupts used by every GPIO group
-- gpio-banks : How many gpio banks on this controller
-- gpio-controller : Indicates this device is a GPIO controller
-- interrupt-controller : Marks the device node as an interrupt controller
-
-The GPIO controller also acts as an interrupt controller. It uses the default
-two cells specifier as described in Documentation/devicetree/bindings/
-interrupt-controller/interrupts.txt.
-
-Example:
-
- gpio_0: gpio_mediam@17040000 {
- compatible = "sirf,atlas7-gpio";
- reg = <0x17040000 0x1000>;
- interrupts = <0 13 0>, <0 14 0>;
-
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
-
- gpio-controller;
- interrupt-controller;
-
- gpio-banks = <2>;
- gpio-ranges = <&pinctrl 0 0 0>,
- <&pinctrl 32 0 0>;
- gpio-ranges-group-names = "lvds_gpio_grp",
- "uart_nand_gpio_grp";
- };
-
- leds {
- compatible = "gpio-leds";
-
- led1 {
- gpios = <&gpio_1 15 0>;
- ...
- };
-
- led2 {
- gpios = <&gpio_2 34 0>;
- ...
- };
- };
-
-Please refer to gpio.txt in this directory for details of the common
-gpio properties used by devices.
diff --git a/dts/Bindings/gpio/gpio-davinci.txt b/dts/Bindings/gpio/gpio-davinci.txt
index cd91d61eac..696ea46227 100644
--- a/dts/Bindings/gpio/gpio-davinci.txt
+++ b/dts/Bindings/gpio/gpio-davinci.txt
@@ -7,6 +7,7 @@ Required Properties:
"ti,k2g-gpio", "ti,keystone-gpio": for 66AK2G
"ti,am654-gpio", "ti,keystone-gpio": for TI K3 AM654
"ti,j721e-gpio", "ti,keystone-gpio": for J721E SoCs
+ "ti,am64-gpio", "ti,keystone-gpio": for AM64 SoCs
- reg: Physical base address of the controller and the size of memory mapped
registers.
diff --git a/dts/Bindings/gpio/gpio-pca95xx.yaml b/dts/Bindings/gpio/gpio-pca95xx.yaml
index f5ee23c2df..b6a6e742b6 100644
--- a/dts/Bindings/gpio/gpio-pca95xx.yaml
+++ b/dts/Bindings/gpio/gpio-pca95xx.yaml
@@ -32,6 +32,7 @@ properties:
- maxim,max7327
- nxp,pca6416
- nxp,pca9505
+ - nxp,pca9506
- nxp,pca9534
- nxp,pca9535
- nxp,pca9536
@@ -70,7 +71,7 @@ properties:
gpio-line-names:
minItems: 1
- maxItems: 32
+ maxItems: 40
interrupts:
maxItems: 1
@@ -81,6 +82,7 @@ properties:
const: 2
reset-gpios:
+ maxItems: 1
description:
GPIO specification for the RESET input. This is an active low signal to
the PCA953x. Not valid for Maxim MAX732x devices.
diff --git a/dts/Bindings/gpio/gpio-stericsson-coh901.txt b/dts/Bindings/gpio/gpio-stericsson-coh901.txt
deleted file mode 100644
index fd665b44d7..0000000000
--- a/dts/Bindings/gpio/gpio-stericsson-coh901.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-ST-Ericsson COH 901 571/3 GPIO controller
-
-Required properties:
-- compatible: Compatible property value should be "stericsson,gpio-coh901"
-- reg: Physical base address of the controller and length of memory mapped
- region.
-- interrupts: the 0...n interrupts assigned to the different GPIO ports/banks.
diff --git a/dts/Bindings/gpio/mrvl-gpio.yaml b/dts/Bindings/gpio/mrvl-gpio.yaml
index 4db3b8a333..9cf6137dd5 100644
--- a/dts/Bindings/gpio/mrvl-gpio.yaml
+++ b/dts/Bindings/gpio/mrvl-gpio.yaml
@@ -82,8 +82,7 @@ properties:
'#gpio-cells':
const: 2
- gpio-ranges:
- maxItems: 1
+ gpio-ranges: true
interrupts: true
diff --git a/dts/Bindings/gpio/mstar,msc313-gpio.yaml b/dts/Bindings/gpio/mstar,msc313-gpio.yaml
index 1f2ef408bb..fe1e1c63ff 100644
--- a/dts/Bindings/gpio/mstar,msc313-gpio.yaml
+++ b/dts/Bindings/gpio/mstar,msc313-gpio.yaml
@@ -46,7 +46,7 @@ examples:
#include <dt-bindings/gpio/msc313-gpio.h>
gpio: gpio@207800 {
- compatible = "mstar,msc313e-gpio";
+ compatible = "mstar,msc313-gpio";
#gpio-cells = <2>;
reg = <0x207800 0x200>;
gpio-controller;
diff --git a/dts/Bindings/gpio/renesas,rcar-gpio.yaml b/dts/Bindings/gpio/renesas,rcar-gpio.yaml
index 5026662e45..f2541739ee 100644
--- a/dts/Bindings/gpio/renesas,rcar-gpio.yaml
+++ b/dts/Bindings/gpio/renesas,rcar-gpio.yaml
@@ -48,6 +48,9 @@ properties:
- renesas,gpio-r8a77995 # R-Car D3
- const: renesas,rcar-gen3-gpio # R-Car Gen3 or RZ/G2
+ - items:
+ - const: renesas,gpio-r8a779a0 # R-Car V3U
+
reg:
maxItems: 1
diff --git a/dts/Bindings/gpio/sifive,gpio.yaml b/dts/Bindings/gpio/sifive,gpio.yaml
index a0efd8dc25..c2902aac25 100644
--- a/dts/Bindings/gpio/sifive,gpio.yaml
+++ b/dts/Bindings/gpio/sifive,gpio.yaml
@@ -13,7 +13,10 @@ maintainers:
properties:
compatible:
items:
- - const: sifive,fu540-c000-gpio
+ - enum:
+ - sifive,fu540-c000-gpio
+ - sifive,fu740-c000-gpio
+ - canaan,k210-gpiohs
- const: sifive,gpio0
reg:
@@ -21,9 +24,9 @@ properties:
interrupts:
description:
- interrupt mapping one per GPIO. Maximum 16 GPIOs.
+ Interrupt mapping, one per GPIO. Maximum 32 GPIOs.
minItems: 1
- maxItems: 16
+ maxItems: 32
interrupt-controller: true
@@ -36,6 +39,14 @@ properties:
"#gpio-cells":
const: 2
+ ngpios:
+ description:
+ The number of GPIOs available on the controller implementation.
+ It is 16 for the SiFive SoCs and 32 for the Canaan K210.
+ minimum: 1
+ maximum: 32
+ default: 16
+
gpio-controller: true
required:
@@ -44,10 +55,20 @@ required:
- interrupts
- interrupt-controller
- "#interrupt-cells"
- - clocks
- "#gpio-cells"
- gpio-controller
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - sifive,fu540-c000-gpio
+ - sifive,fu740-c000-gpio
+then:
+ required:
+ - clocks
+
additionalProperties: false
examples:
diff --git a/dts/Bindings/gpio/toshiba,gpio-visconti.yaml b/dts/Bindings/gpio/toshiba,gpio-visconti.yaml
new file mode 100644
index 0000000000..9ad470e019
--- /dev/null
+++ b/dts/Bindings/gpio/toshiba,gpio-visconti.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/toshiba,gpio-visconti.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Toshiba Visconti ARM SoCs GPIO controller
+
+maintainers:
+ - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
+
+properties:
+ compatible:
+ items:
+ - const: toshiba,gpio-tmpv7708
+
+ reg:
+ maxItems: 1
+
+ "#gpio-cells":
+ const: 2
+
+ gpio-ranges: true
+
+ gpio-controller: true
+
+ interrupt-controller: true
+
+ "#interrupt-cells":
+ const: 2
+
+ interrupts:
+ description:
+ interrupt mapping one per GPIO.
+ minItems: 16
+ maxItems: 16
+
+required:
+ - compatible
+ - reg
+ - "#gpio-cells"
+ - gpio-ranges
+ - gpio-controller
+ - interrupt-controller
+ - "#interrupt-cells"
+ - interrupt-parent
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ gpio: gpio@28020000 {
+ compatible = "toshiba,gpio-tmpv7708";
+ reg = <0 0x28020000 0 0x1000>;
+ #gpio-cells = <0x2>;
+ gpio-ranges = <&pmux 0 0 32>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&gic>;
+ };
+ };
+...
diff --git a/dts/Bindings/gpio/zx296702-gpio.txt b/dts/Bindings/gpio/zx296702-gpio.txt
deleted file mode 100644
index 0dab156fcf..0000000000
--- a/dts/Bindings/gpio/zx296702-gpio.txt
+++ /dev/null
@@ -1,24 +0,0 @@
-ZTE ZX296702 GPIO controller
-
-Required properties:
-- compatible : "zte,zx296702-gpio"
-- #gpio-cells : Should be two. The first cell is the pin number and the
- second cell is used to specify optional parameters:
- - bit 0 specifies polarity (0 for normal, 1 for inverted)
-- gpio-controller : Marks the device node as a GPIO controller.
-- interrupts : Interrupt mapping for GPIO IRQ.
-- gpio-ranges : Interaction with the PINCTRL subsystem.
-
-gpio1: gpio@b008040 {
- compatible = "zte,zx296702-gpio";
- reg = <0xb008040 0x40>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = < &pmx0 0 54 2 &pmx0 2 59 14>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&intc>;
- interrupt-controller;
- #interrupt-cells = <2>;
- clock-names = "gpio_pclk";
- clocks = <&lsp0clk ZX296702_GPIO_CLK>;
-};