diff options
Diffstat (limited to 'dts/Bindings/i2c')
| -rw-r--r-- | dts/Bindings/i2c/i2c-arb-gpio-challenge.txt | 6 | ||||
| -rw-r--r-- | dts/Bindings/i2c/i2c-cros-ec-tunnel.txt | 39 | ||||
| -rw-r--r-- | dts/Bindings/i2c/i2c-exynos5.txt | 11 | ||||
| -rw-r--r-- | dts/Bindings/i2c/i2c-mv64xxx.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/i2c/i2c-rcar.txt | 3 | ||||
| -rw-r--r-- | dts/Bindings/i2c/i2c-sh_mobile.txt | 26 |
6 files changed, 84 insertions, 3 deletions
diff --git a/dts/Bindings/i2c/i2c-arb-gpio-challenge.txt b/dts/Bindings/i2c/i2c-arb-gpio-challenge.txt index 1ac8ea8ade..bfeabb8439 100644 --- a/dts/Bindings/i2c/i2c-arb-gpio-challenge.txt +++ b/dts/Bindings/i2c/i2c-arb-gpio-challenge.txt @@ -8,6 +8,12 @@ the standard I2C multi-master rules. Using GPIOs is generally useful in the case where there is a device on the bus that has errata and/or bugs that makes standard multimaster mode not feasible. +Note that this scheme works well enough but has some downsides: +* It is nonstandard (not using standard I2C multimaster) +* Having two masters on a bus in general makes it relatively hard to debug + problems (hard to tell if i2c issues were caused by one master, another, or + some device on the bus). + Algorithm: diff --git a/dts/Bindings/i2c/i2c-cros-ec-tunnel.txt b/dts/Bindings/i2c/i2c-cros-ec-tunnel.txt new file mode 100644 index 0000000000..898f030eba --- /dev/null +++ b/dts/Bindings/i2c/i2c-cros-ec-tunnel.txt @@ -0,0 +1,39 @@ +I2C bus that tunnels through the ChromeOS EC (cros-ec) +====================================================== +On some ChromeOS board designs we've got a connection to the EC (embedded +controller) but no direct connection to some devices on the other side of +the EC (like a battery and PMIC). To get access to those devices we need +to tunnel our i2c commands through the EC. + +The node for this device should be under a cros-ec node like google,cros-ec-spi +or google,cros-ec-i2c. + + +Required properties: +- compatible: google,cros-ec-i2c-tunnel +- google,remote-bus: The EC bus we'd like to talk to. + +Optional child nodes: +- One node per I2C device connected to the tunnelled I2C bus. + + +Example: + cros-ec@0 { + compatible = "google,cros-ec-spi"; + + ... + + i2c-tunnel { + compatible = "google,cros-ec-i2c-tunnel"; + #address-cells = <1>; + #size-cells = <0>; + + google,remote-bus = <0>; + + battery: sbs-battery@b { + compatible = "sbs,sbs-battery"; + reg = <0xb>; + sbs,poll-retry-count = <1>; + }; + }; + } diff --git a/dts/Bindings/i2c/i2c-exynos5.txt b/dts/Bindings/i2c/i2c-exynos5.txt index 056732cfdc..d4745e31f5 100644 --- a/dts/Bindings/i2c/i2c-exynos5.txt +++ b/dts/Bindings/i2c/i2c-exynos5.txt @@ -5,7 +5,14 @@ at various speeds ranging from 100khz to 3.4Mhz. Required properties: - compatible: value should be. - -> "samsung,exynos5-hsi2c", for i2c compatible with exynos5 hsi2c. + -> "samsung,exynos5-hsi2c", (DEPRECATED) + for i2c compatible with HSI2C available + on Exynos5250 and Exynos5420 SoCs. + -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available + on Exynos5250 and Exynos5420 SoCs. + -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available + on Exynos5260 SoCs. + - reg: physical base address of the controller and length of memory mapped region. - interrupts: interrupt number to the cpu. @@ -26,7 +33,7 @@ Optional properties: Example: hsi2c@12ca0000 { - compatible = "samsung,exynos5-hsi2c"; + compatible = "samsung,exynos5250-hsi2c"; reg = <0x12ca0000 0x100>; interrupts = <56>; clock-frequency = <100000>; diff --git a/dts/Bindings/i2c/i2c-mv64xxx.txt b/dts/Bindings/i2c/i2c-mv64xxx.txt index befd4fb476..5c30026921 100644 --- a/dts/Bindings/i2c/i2c-mv64xxx.txt +++ b/dts/Bindings/i2c/i2c-mv64xxx.txt @@ -5,7 +5,7 @@ Required properties : - reg : Offset and length of the register set for the device - compatible : Should be either: - - "allwinner,sun4i-i2c" + - "allwinner,sun4i-a10-i2c" - "allwinner,sun6i-a31-i2c" - "marvell,mv64xxx-i2c" - "marvell,mv78230-i2c" diff --git a/dts/Bindings/i2c/i2c-rcar.txt b/dts/Bindings/i2c/i2c-rcar.txt index dd8b2dd1ed..16b3e07aa9 100644 --- a/dts/Bindings/i2c/i2c-rcar.txt +++ b/dts/Bindings/i2c/i2c-rcar.txt @@ -7,6 +7,9 @@ Required properties: "renesas,i2c-r8a7779" "renesas,i2c-r8a7790" "renesas,i2c-r8a7791" + "renesas,i2c-r8a7792" + "renesas,i2c-r8a7793" + "renesas,i2c-r8a7794" - reg: physical base address of the controller and length of memory mapped region. - interrupts: interrupt specifier. diff --git a/dts/Bindings/i2c/i2c-sh_mobile.txt b/dts/Bindings/i2c/i2c-sh_mobile.txt new file mode 100644 index 0000000000..d2153ce36f --- /dev/null +++ b/dts/Bindings/i2c/i2c-sh_mobile.txt @@ -0,0 +1,26 @@ +Device tree configuration for Renesas IIC (sh_mobile) driver + +Required properties: +- compatible : "renesas,iic-<soctype>". "renesas,rmobile-iic" as fallback +- reg : address start and address range size of device +- interrupts : interrupt of device +- clocks : clock for device +- #address-cells : should be <1> +- #size-cells : should be <0> + +Optional properties: +- clock-frequency : frequency of bus clock in Hz. Default 100kHz if unset. + +Pinctrl properties might be needed, too. See there. + +Example: + + iic0: i2c@e6500000 { + compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; + reg = <0 0xe6500000 0 0x425>; + interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7790_CLK_IIC0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; |