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-rw-r--r--dts/Bindings/iio/adc/amlogic,meson-saradc.txt1
-rw-r--r--dts/Bindings/iio/adc/at91-sama5d2_adc.txt9
-rw-r--r--dts/Bindings/iio/adc/avia-hx711.txt8
-rw-r--r--dts/Bindings/iio/adc/cpcap-adc.txt1
-rw-r--r--dts/Bindings/iio/adc/fsl,imx25-gcq.txt1
-rw-r--r--dts/Bindings/iio/adc/max1027-adc.txt2
-rw-r--r--dts/Bindings/iio/adc/sigma-delta-modulator.txt2
-rw-r--r--dts/Bindings/iio/adc/sprd,sc27xx-adc.txt36
-rw-r--r--dts/Bindings/iio/adc/st,stm32-adc.txt1
-rw-r--r--dts/Bindings/iio/adc/xilinx-xadc.txt1
10 files changed, 54 insertions, 8 deletions
diff --git a/dts/Bindings/iio/adc/amlogic,meson-saradc.txt b/dts/Bindings/iio/adc/amlogic,meson-saradc.txt
index d1acd5ea27..54b823f3a4 100644
--- a/dts/Bindings/iio/adc/amlogic,meson-saradc.txt
+++ b/dts/Bindings/iio/adc/amlogic,meson-saradc.txt
@@ -4,6 +4,7 @@ Required properties:
- compatible: depending on the SoC this should be one of:
- "amlogic,meson8-saradc" for Meson8
- "amlogic,meson8b-saradc" for Meson8b
+ - "amlogic,meson8m2-saradc" for Meson8m2
- "amlogic,meson-gxbb-saradc" for GXBB
- "amlogic,meson-gxl-saradc" for GXL
- "amlogic,meson-gxm-saradc" for GXM
diff --git a/dts/Bindings/iio/adc/at91-sama5d2_adc.txt b/dts/Bindings/iio/adc/at91-sama5d2_adc.txt
index 6469a4cd2a..4a3c1d496e 100644
--- a/dts/Bindings/iio/adc/at91-sama5d2_adc.txt
+++ b/dts/Bindings/iio/adc/at91-sama5d2_adc.txt
@@ -21,6 +21,14 @@ Optional properties:
- dmas: Phandle to dma channel for the ADC.
- dma-names: Must be "rx" when dmas property is being used.
See ../../dma/dma.txt for details.
+ - #io-channel-cells: in case consumer drivers are attached, this must be 1.
+ See <Documentation/devicetree/bindings/iio/iio-bindings.txt> for details.
+
+Properties for consumer drivers:
+ - Consumer drivers can be connected to this producer device, as specified
+ in <Documentation/devicetree/bindings/iio/iio-bindings.txt>
+ - Channels exposed are specified in:
+ <dt-bindings/iio/adc/at91-sama5d2_adc.txt>
Example:
@@ -38,4 +46,5 @@ adc: adc@fc030000 {
atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>;
dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>;
dma-names = "rx";
+ #io-channel-cells = <1>;
}
diff --git a/dts/Bindings/iio/adc/avia-hx711.txt b/dts/Bindings/iio/adc/avia-hx711.txt
index b3629405f5..7222328a3d 100644
--- a/dts/Bindings/iio/adc/avia-hx711.txt
+++ b/dts/Bindings/iio/adc/avia-hx711.txt
@@ -8,11 +8,17 @@ Required properties:
See Documentation/devicetree/bindings/gpio/gpio.txt
- avdd-supply: Definition of the regulator used as analog supply
+Optional properties:
+ - clock-frequency: Frequency of PD_SCK in Hz
+ Minimum value allowed is 10 kHz because of maximum
+ high time of 50 microseconds.
+
Example:
-weight@0 {
+weight {
compatible = "avia,hx711";
sck-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
dout-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
avdd-suppy = <&avdd>;
+ clock-frequency = <100000>;
};
diff --git a/dts/Bindings/iio/adc/cpcap-adc.txt b/dts/Bindings/iio/adc/cpcap-adc.txt
index 487ea96685..ec04008e8f 100644
--- a/dts/Bindings/iio/adc/cpcap-adc.txt
+++ b/dts/Bindings/iio/adc/cpcap-adc.txt
@@ -2,7 +2,6 @@ Motorola CPCAP PMIC ADC binding
Required properties:
- compatible: Should be "motorola,cpcap-adc" or "motorola,mapphone-cpcap-adc"
-- interrupt-parent: The interrupt controller
- interrupts: The interrupt number for the ADC device
- interrupt-names: Should be "adcdone"
- #io-channel-cells: Number of cells in an IIO specifier
diff --git a/dts/Bindings/iio/adc/fsl,imx25-gcq.txt b/dts/Bindings/iio/adc/fsl,imx25-gcq.txt
index b0866d36a3..eebdcec3da 100644
--- a/dts/Bindings/iio/adc/fsl,imx25-gcq.txt
+++ b/dts/Bindings/iio/adc/fsl,imx25-gcq.txt
@@ -8,7 +8,6 @@ Required properties:
- reg: Should be the register range of the module.
- interrupts: Should be the interrupt number of the module.
Typically this is <1>.
- - interrupt-parent: phandle to the tsadc module of the i.MX25.
- #address-cells: Should be <1> (setting for the subnodes)
- #size-cells: Should be <0> (setting for the subnodes)
diff --git a/dts/Bindings/iio/adc/max1027-adc.txt b/dts/Bindings/iio/adc/max1027-adc.txt
index a8770cc6bc..e680c61dfb 100644
--- a/dts/Bindings/iio/adc/max1027-adc.txt
+++ b/dts/Bindings/iio/adc/max1027-adc.txt
@@ -3,8 +3,6 @@
Required properties:
- compatible: Should be "maxim,max1027" or "maxim,max1029" or "maxim,max1031"
- reg: SPI chip select number for the device
- - interrupt-parent: phandle to the parent interrupt controller
- see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
- interrupts: IRQ line for the ADC
see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
diff --git a/dts/Bindings/iio/adc/sigma-delta-modulator.txt b/dts/Bindings/iio/adc/sigma-delta-modulator.txt
index ba24ca7ba9..59b92cd325 100644
--- a/dts/Bindings/iio/adc/sigma-delta-modulator.txt
+++ b/dts/Bindings/iio/adc/sigma-delta-modulator.txt
@@ -7,7 +7,7 @@ Required properties:
Example node:
- ads1202: adc@0 {
+ ads1202: adc {
compatible = "sd-modulator";
#io-channel-cells = <0>;
};
diff --git a/dts/Bindings/iio/adc/sprd,sc27xx-adc.txt b/dts/Bindings/iio/adc/sprd,sc27xx-adc.txt
new file mode 100644
index 0000000000..8aad960de5
--- /dev/null
+++ b/dts/Bindings/iio/adc/sprd,sc27xx-adc.txt
@@ -0,0 +1,36 @@
+Spreadtrum SC27XX series PMICs ADC binding
+
+Required properties:
+- compatible: Should be one of the following.
+ "sprd,sc2720-adc"
+ "sprd,sc2721-adc"
+ "sprd,sc2723-adc"
+ "sprd,sc2730-adc"
+ "sprd,sc2731-adc"
+- reg: The address offset of ADC controller.
+- interrupt-parent: The interrupt controller.
+- interrupts: The interrupt number for the ADC device.
+- #io-channel-cells: Number of cells in an IIO specifier.
+- hwlocks: Reference to a phandle of a hwlock provider node.
+
+Example:
+
+ sc2731_pmic: pmic@0 {
+ compatible = "sprd,sc2731";
+ reg = <0>;
+ spi-max-frequency = <26000000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pmic_adc: adc@480 {
+ compatible = "sprd,sc2731-adc";
+ reg = <0x480>;
+ interrupt-parent = <&sc2731_pmic>;
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+ #io-channel-cells = <1>;
+ hwlocks = <&hwlock 4>;
+ };
+ };
diff --git a/dts/Bindings/iio/adc/st,stm32-adc.txt b/dts/Bindings/iio/adc/st,stm32-adc.txt
index f1ead43a1a..8346bcb04a 100644
--- a/dts/Bindings/iio/adc/st,stm32-adc.txt
+++ b/dts/Bindings/iio/adc/st,stm32-adc.txt
@@ -60,7 +60,6 @@ Required properties:
- reg: Offset of ADC instance in ADC block (e.g. may be 0x0, 0x100, 0x200).
- clocks: Input clock private to this ADC instance. It's required only on
stm32f4, that has per instance clock input for registers access.
-- interrupt-parent: Phandle to the parent interrupt controller.
- interrupts: IRQ Line for the ADC (e.g. may be 0 for adc@0, 1 for adc@100 or
2 for adc@200).
- st,adc-channels: List of single-ended channels muxed for this ADC.
diff --git a/dts/Bindings/iio/adc/xilinx-xadc.txt b/dts/Bindings/iio/adc/xilinx-xadc.txt
index d71258e2d4..e0e0755cab 100644
--- a/dts/Bindings/iio/adc/xilinx-xadc.txt
+++ b/dts/Bindings/iio/adc/xilinx-xadc.txt
@@ -22,7 +22,6 @@ Required properties:
clock to the AXI bus interface of the core.
Optional properties:
- - interrupt-parent: phandle to the parent interrupt controller
- xlnx,external-mux:
* "none": No external multiplexer is used, this is the default
if the property is omitted.
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-16 16:47:34 +0000