diff options
Diffstat (limited to 'dts/Bindings/interrupt-controller')
| -rw-r--r-- | dts/Bindings/interrupt-controller/digicolor-ic.txt | 21 | ||||
| -rw-r--r-- | dts/Bindings/interrupt-controller/renesas,intc-irqpin.txt | 5 | ||||
| -rw-r--r-- | dts/Bindings/interrupt-controller/ti,omap-intc-irq.txt | 28 |
3 files changed, 54 insertions, 0 deletions
diff --git a/dts/Bindings/interrupt-controller/digicolor-ic.txt b/dts/Bindings/interrupt-controller/digicolor-ic.txt new file mode 100644 index 0000000000..42d41ec84c --- /dev/null +++ b/dts/Bindings/interrupt-controller/digicolor-ic.txt @@ -0,0 +1,21 @@ +Conexant Digicolor Interrupt Controller + +Required properties: + +- compatible : should be "cnxt,cx92755-ic" +- reg : Specifies base physical address and size of the interrupt controller + registers (IC) area +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The value shall be 1. +- syscon: A phandle to the syscon node describing UC registers + +Example: + + intc: interrupt-controller@f0000040 { + compatible = "cnxt,cx92755-ic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0xf0000040 0x40>; + syscon = <&uc_regs>; + }; diff --git a/dts/Bindings/interrupt-controller/renesas,intc-irqpin.txt b/dts/Bindings/interrupt-controller/renesas,intc-irqpin.txt index c73acd0600..4f7946ae8a 100644 --- a/dts/Bindings/interrupt-controller/renesas,intc-irqpin.txt +++ b/dts/Bindings/interrupt-controller/renesas,intc-irqpin.txt @@ -9,6 +9,11 @@ Required properties: - "renesas,intc-irqpin-r8a7778" (R-Car M1A) - "renesas,intc-irqpin-r8a7779" (R-Car H1) - "renesas,intc-irqpin-sh73a0" (SH-Mobile AG5) + +- reg: Base address and length of each register bank used by the external + IRQ pins driven by the interrupt controller hardware module. The base + addresses, length and number of required register banks varies with soctype. + - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in interrupts.txt in this directory diff --git a/dts/Bindings/interrupt-controller/ti,omap-intc-irq.txt b/dts/Bindings/interrupt-controller/ti,omap-intc-irq.txt new file mode 100644 index 0000000000..38ce5d0377 --- /dev/null +++ b/dts/Bindings/interrupt-controller/ti,omap-intc-irq.txt @@ -0,0 +1,28 @@ +Omap2/3 intc controller + +On TI omap2 and 3 the intc interrupt controller can provide +96 or 128 IRQ signals to the ARM host depending on the SoC. + +Required Properties: +- compatible: should be one of + "ti,omap2-intc" + "ti,omap3-intc" + "ti,dm814-intc" + "ti,dm816-intc" + "ti,am33xx-intc" + +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode interrupt + source, should be 1 for intc +- interrupts: interrupt reference to primary interrupt controller + +Please refer to interrupts.txt in this directory for details of the common +Interrupt Controllers bindings used by client devices. + +Example: + intc: interrupt-controller@48200000 { + compatible = "ti,omap3-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x48200000 0x1000>; + }; |