diff options
Diffstat (limited to 'dts/Bindings/memory-controllers/nvidia,tegra124-emc.yaml')
| -rw-r--r-- | dts/Bindings/memory-controllers/nvidia,tegra124-emc.yaml | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/dts/Bindings/memory-controllers/nvidia,tegra124-emc.yaml b/dts/Bindings/memory-controllers/nvidia,tegra124-emc.yaml index 278549f9e0..09bde65e19 100644 --- a/dts/Bindings/memory-controllers/nvidia,tegra124-emc.yaml +++ b/dts/Bindings/memory-controllers/nvidia,tegra124-emc.yaml @@ -29,11 +29,23 @@ properties: items: - const: emc + "#interconnect-cells": + const: 0 + nvidia,memory-controller: $ref: /schemas/types.yaml#/definitions/phandle description: phandle of the memory controller node + core-supply: + description: + Phandle of voltage regulator of the SoC "core" power domain. + + operating-points-v2: + description: + Should contain freqs and voltages and opp-supported-hw property, which + is a bitfield indicating SoC speedo ID mask. + patternProperties: "^emc-timings-[0-9]+$": type: object @@ -327,6 +339,8 @@ required: - clocks - clock-names - nvidia,memory-controller + - "#interconnect-cells" + - operating-points-v2 additionalProperties: false @@ -345,6 +359,7 @@ examples: #iommu-cells = <1>; #reset-cells = <1>; + #interconnect-cells = <1>; }; external-memory-controller@7001b000 { @@ -354,6 +369,10 @@ examples: clock-names = "emc"; nvidia,memory-controller = <&mc>; + operating-points-v2 = <&dvfs_opp_table>; + core-supply = <&vdd_core>; + + #interconnect-cells = <0>; emc-timings-0 { nvidia,ram-code = <3>; |