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-rw-r--r--dts/Bindings/memory-controllers/nvidia,tegra20-mc.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/dts/Bindings/memory-controllers/nvidia,tegra20-mc.txt b/dts/Bindings/memory-controllers/nvidia,tegra20-mc.txt
index e55328237d..739b7c6f2e 100644
--- a/dts/Bindings/memory-controllers/nvidia,tegra20-mc.txt
+++ b/dts/Bindings/memory-controllers/nvidia,tegra20-mc.txt
@@ -16,6 +16,8 @@ Required properties:
IOMMU specifier needed to encode an address. GART supports only a single
address space that is shared by all devices, therefore no additional
information needed for the address encoding.
+- #interconnect-cells : Should be 1. This cell represents memory client.
+ The assignments may be found in header file <dt-bindings/memory/tegra20-mc.h>.
Example:
mc: memory-controller@7000f000 {
@@ -27,6 +29,7 @@ Example:
interrupts = <GIC_SPI 77 0x04>;
#reset-cells = <1>;
#iommu-cells = <0>;
+ #interconnect-cells = <1>;
};
video-codec@6001a000 {