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-rw-r--r--dts/Bindings/memory-controllers/nvidia,tegra30-mc.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/dts/Bindings/memory-controllers/nvidia,tegra30-mc.txt b/dts/Bindings/memory-controllers/nvidia,tegra30-mc.txt
index 8dbe47013c..14968b048c 100644
--- a/dts/Bindings/memory-controllers/nvidia,tegra30-mc.txt
+++ b/dts/Bindings/memory-controllers/nvidia,tegra30-mc.txt
@@ -12,6 +12,8 @@ Required properties:
- clock-names: Must include the following entries:
- mc: the module's clock input
- interrupts: The interrupt outputs from the controller.
+
+Required properties for Tegra30, Tegra114, Tegra124, Tegra132 and Tegra210:
- #iommu-cells: Should be 1. The single cell of the IOMMU specifier defines
the SWGROUP of the master.