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-rw-r--r--dts/Bindings/mips/mscc.txt16
1 files changed, 16 insertions, 0 deletions
diff --git a/dts/Bindings/mips/mscc.txt b/dts/Bindings/mips/mscc.txt
index ae15ec3..bc817e9 100644
--- a/dts/Bindings/mips/mscc.txt
+++ b/dts/Bindings/mips/mscc.txt
@@ -41,3 +41,19 @@ Example:
compatible = "mscc,ocelot-cpu-syscon", "syscon";
reg = <0x70000000 0x2c>;
};
+
+o HSIO regs:
+
+The SoC has a few registers (HSIO) handling miscellaneous functionalities:
+configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and
+status, SerDes muxing and a thermal sensor.
+
+Required properties:
+- compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
+- reg : Should contain registers location and length
+
+Example:
+ syscon@10d0000 {
+ compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
+ reg = <0x10d0000 0x10000>;
+ };