diff options
Diffstat (limited to 'dts/Bindings/mmc/arasan,sdhci.yaml')
| -rw-r--r-- | dts/Bindings/mmc/arasan,sdhci.yaml | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/dts/Bindings/mmc/arasan,sdhci.yaml b/dts/Bindings/mmc/arasan,sdhci.yaml index 37a5fe7b26..de6f076e0e 100644 --- a/dts/Bindings/mmc/arasan,sdhci.yaml +++ b/dts/Bindings/mmc/arasan,sdhci.yaml @@ -88,6 +88,12 @@ properties: description: For this device it is strongly suggested to include arasan,soc-ctl-syscon. + - items: + - const: intel,thunderbay-sdhci-5.1 # Intel Thunder Bay eMMC PHY + - const: arasan,sdhci-5.1 + description: + For this device it is strongly suggested to include + clock-output-names and '#clock-cells'. reg: maxItems: 1 @@ -153,7 +159,6 @@ properties: The MIO bank number in which the command and data lines are configured. dependencies: - clock-output-names: [ '#clock-cells' ] '#clock-cells': [ clock-output-names ] required: @@ -301,3 +306,22 @@ examples: <&scmi_clk KEEM_BAY_PSS_SD0>; arasan,soc-ctl-syscon = <&sd0_phy_syscon>; }; + + - | + #define EMMC_XIN_CLK + #define EMMC_AXI_CLK + #define TBH_PSS_EMMC_RST_N + mmc@80420000 { + compatible = "intel,thunderbay-sdhci-5.1", "arasan,sdhci-5.1"; + interrupts = <GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x80420000 0x400>; + clocks = <&scmi_clk EMMC_XIN_CLK>, + <&scmi_clk EMMC_AXI_CLK>; + clock-names = "clk_xin", "clk_ahb"; + phys = <&emmc_phy>; + phy-names = "phy_arasan"; + assigned-clocks = <&scmi_clk EMMC_XIN_CLK>; + clock-output-names = "emmc_cardclock"; + resets = <&rst_pss1 TBH_PSS_EMMC_RST_N>; + #clock-cells = <0x0>; + }; |