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-rw-r--r--dts/Bindings/net/microchip,enc28j60.txt3
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diff --git a/dts/Bindings/net/microchip,enc28j60.txt b/dts/Bindings/net/microchip,enc28j60.txt
index 44dff53..24626e0 100644
--- a/dts/Bindings/net/microchip,enc28j60.txt
+++ b/dts/Bindings/net/microchip,enc28j60.txt
@@ -8,9 +8,6 @@ the SPI master node.
Required properties:
- compatible: Should be "microchip,enc28j60"
- reg: Specify the SPI chip select the ENC28J60 is wired to
-- interrupt-parent: Specify the phandle of the source interrupt, see interrupt
- binding documentation for details. Usually this is the GPIO bank
- the interrupt line is wired to.
- interrupts: Specify the interrupt index within the interrupt controller (referred
to above in interrupt-parent) and interrupt type. The ENC28J60 natively
generates falling edge interrupts, however, additional board logic