diff options
Diffstat (limited to 'dts/Bindings/phy/mediatek,tphy.yaml')
-rw-r--r-- | dts/Bindings/phy/mediatek,tphy.yaml | 47 |
1 files changed, 45 insertions, 2 deletions
diff --git a/dts/Bindings/phy/mediatek,tphy.yaml b/dts/Bindings/phy/mediatek,tphy.yaml index 9e6c0f43f1..acba072012 100644 --- a/dts/Bindings/phy/mediatek,tphy.yaml +++ b/dts/Bindings/phy/mediatek,tphy.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/phy/mediatek,tphy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MediaTek T-PHY Controller Device Tree Bindings +title: MediaTek T-PHY Controller maintainers: - Chunfeng Yun <chunfeng.yun@mediatek.com> @@ -64,7 +64,7 @@ description: | properties: $nodename: - pattern: "^t-phy@[0-9a-f]+$" + pattern: "^t-phy(@[0-9a-f]+)?$" compatible: oneOf: @@ -79,10 +79,15 @@ properties: - enum: - mediatek,mt2712-tphy - mediatek,mt7629-tphy + - mediatek,mt7986-tphy - mediatek,mt8183-tphy + - mediatek,mt8186-tphy + - mediatek,mt8192-tphy + - mediatek,mt8365-tphy - const: mediatek,generic-tphy-v2 - items: - enum: + - mediatek,mt8188-tphy - mediatek,mt8195-tphy - const: mediatek,generic-tphy-v3 - const: mediatek,mt2701-u3phy @@ -159,6 +164,25 @@ patternProperties: - PHY_TYPE_USB3 - PHY_TYPE_PCIE - PHY_TYPE_SATA + - PHY_TYPE_SGMII + + nvmem-cells: + items: + - description: internal R efuse for U2 PHY or U3/PCIe PHY + - description: rx_imp_sel efuse for U3/PCIe PHY + - description: tx_imp_sel efuse for U3/PCIe PHY + description: | + Phandles to nvmem cell that contains the efuse data; + Available only for U2 PHY or U3/PCIe PHY of version 2/3, these + three items should be provided at the same time for U3/PCIe PHY, + when use software to load efuse; + If unspecified, will use hardware auto-load efuse. + + nvmem-cell-names: + items: + - const: intr + - const: rx_imp + - const: tx_imp # The following optional vendor properties are only for debug or HQA test mediatek,eye-src: @@ -196,11 +220,30 @@ patternProperties: minimum: 1 maximum: 15 + mediatek,pre-emphasis: + description: + The level of pre-emphasis which used to widen the eye opening and + boost eye swing, the unit step is about 4.16% increment; e.g. the + level 1 means amplitude increases about 4.16%, the level 2 is about + 8.3% etc. (U2 phy) + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 3 + mediatek,bc12: description: Specify the flag to enable BC1.2 if support it type: boolean + mediatek,force-mode: + description: + The force mode is used to manually switch the shared phy mode between + USB3 and PCIe, when USB3 phy type is selected by the consumer, and + force-mode is set, will cause phy's power and pipe toggled and force + phy as USB3 mode which switched from default PCIe mode. But perfer to + use the property "mediatek,syscon-type" for newer SoCs that support it. + type: boolean + mediatek,syscon-type: $ref: /schemas/types.yaml#/definitions/phandle-array maxItems: 1 |