summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/phy/phy-mtk-tphy.txt
diff options
context:
space:
mode:
Diffstat (limited to 'dts/Bindings/phy/phy-mtk-tphy.txt')
-rw-r--r--dts/Bindings/phy/phy-mtk-tphy.txt4
1 files changed, 4 insertions, 0 deletions
diff --git a/dts/Bindings/phy/phy-mtk-tphy.txt b/dts/Bindings/phy/phy-mtk-tphy.txt
index 41e09ed..0d34b2b 100644
--- a/dts/Bindings/phy/phy-mtk-tphy.txt
+++ b/dts/Bindings/phy/phy-mtk-tphy.txt
@@ -27,6 +27,10 @@ Optional properties (controller (parent) node):
- reg : offset and length of register shared by multiple ports,
exclude port's private register. It is needed on mt2701
and mt8173, but not on mt2712.
+ - mediatek,src-ref-clk-mhz : frequency of reference clock for slew rate
+ calibrate
+ - mediatek,src-coef : coefficient for slew rate calibrate, depends on
+ SoC process
Required properties (port (child) node):
- reg : address and length of the register set for the port.