summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/phy/samsung,exynos5250-sata-phy.yaml
diff options
context:
space:
mode:
Diffstat (limited to 'dts/Bindings/phy/samsung,exynos5250-sata-phy.yaml')
-rw-r--r--dts/Bindings/phy/samsung,exynos5250-sata-phy.yaml64
1 files changed, 64 insertions, 0 deletions
diff --git a/dts/Bindings/phy/samsung,exynos5250-sata-phy.yaml b/dts/Bindings/phy/samsung,exynos5250-sata-phy.yaml
new file mode 100644
index 0000000000..8751e55948
--- /dev/null
+++ b/dts/Bindings/phy/samsung,exynos5250-sata-phy.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/samsung,exynos5250-sata-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos5250 SoC SATA PHY
+
+maintainers:
+ - Krzysztof Kozlowski <krzk@kernel.org>
+ - Marek Szyprowski <m.szyprowski@samsung.com>
+ - Sylwester Nawrocki <s.nawrocki@samsung.com>
+
+properties:
+ compatible:
+ const: samsung,exynos5250-sata-phy
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: sata_phyctrl
+
+ "#phy-cells":
+ const: 0
+
+ reg:
+ maxItems: 1
+
+ samsung,syscon-phandle:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to PMU system controller interface.
+
+ samsung,exynos-sataphy-i2c-phandle:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to I2C SATA interface.
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - "#phy-cells"
+ - reg
+ - samsung,syscon-phandle
+ - samsung,exynos-sataphy-i2c-phandle
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/exynos5250.h>
+
+ phy@12170000 {
+ compatible = "samsung,exynos5250-sata-phy";
+ reg = <0x12170000 0x1ff>;
+ clocks = <&clock CLK_SATA_PHYCTRL>;
+ clock-names = "sata_phyctrl";
+ #phy-cells = <0>;
+ samsung,syscon-phandle = <&pmu_system_controller>;
+ samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
+ };