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-rw-r--r--dts/Bindings/pinctrl/mediatek,mt8183-pinctrl.yaml51
1 files changed, 30 insertions, 21 deletions
diff --git a/dts/Bindings/pinctrl/mediatek,mt8183-pinctrl.yaml b/dts/Bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
index cc1509e9b9..8507bd15f2 100644
--- a/dts/Bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
+++ b/dts/Bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
@@ -4,12 +4,12 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8183-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Mediatek MT8183 Pin Controller Device Tree Bindings
+title: MediaTek MT8183 Pin Controller
maintainers:
- Sean Wang <sean.wang@kernel.org>
-description: |+
+description:
The MediaTek's MT8183 Pin controller is used to control SoC pins.
properties:
@@ -37,15 +37,15 @@ properties:
"#gpio-cells":
const: 2
- description: |
- Number of cells in GPIO specifier. Since the generic GPIO
- binding is used, the amount of cells must be specified as 2. See the below
- mentioned gpio binding representation for description of particular cells.
+ description:
+ Number of cells in GPIO specifier. Since the generic GPIO binding is used,
+ the amount of cells must be specified as 2. See the below mentioned gpio
+ binding representation for description of particular cells.
gpio-ranges:
minItems: 1
maxItems: 5
- description: |
+ description:
GPIO valid number range.
interrupt-controller: true
@@ -56,6 +56,9 @@ properties:
"#interrupt-cells":
const: 2
+allOf:
+ - $ref: pinctrl.yaml#
+
required:
- compatible
- reg
@@ -64,25 +67,25 @@ required:
- gpio-ranges
patternProperties:
- '-[0-9]+$':
+ '-pins(-[a-z]+)?$':
type: object
additionalProperties: false
patternProperties:
- 'pins':
+ '^pins':
type: object
additionalProperties: false
- description: |
+ description:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and input
schmitt.
- $ref: "/schemas/pinctrl/pincfg-node.yaml"
+ $ref: /schemas/pinctrl/pincfg-node.yaml
properties:
pinmux:
description:
- integer array, represents gpio pin number and mux setting.
+ Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
defined as macros in <soc>-pinfunc.h directly.
@@ -107,8 +110,13 @@ patternProperties:
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
+ drive-strength-microamp:
+ enum: [125, 250, 500, 1000]
+
mediatek,drive-strength-adv:
+ deprecated: true
description: |
+ DEPRECATED: Please use drive-strength-microamp instead.
Describe the specific driving setup property.
For I2C pins, the existing generic driving setup can only support
2/4/6/8/10/12/14/16mA driving. But in specific driving setup, they
@@ -135,8 +143,9 @@ patternProperties:
mediatek,pull-up-adv:
description: |
- Pull up setings for 2 pull resistors, R0 and R1. User can
- configure those special pins. Valid arguments are described as below:
+ Pull up settings for 2 pull resistors, R0 and R1. User can
+ configure those special pins. Valid arguments are described as
+ below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@@ -147,7 +156,8 @@ patternProperties:
mediatek,pull-down-adv:
description: |
Pull down settings for 2 pull resistors, R0 and R1. User can
- configure those special pins. Valid arguments are described as below:
+ configure those special pins. Valid arguments are described as
+ below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@@ -156,14 +166,14 @@ patternProperties:
enum: [0, 1, 2, 3]
mediatek,tdsel:
- description: |
+ description:
An integer describing the steps for output level shifter duty
cycle when asserted (high pulse width adjustment). Valid arguments
are from 0 to 15.
$ref: /schemas/types.yaml#/definitions/uint32
mediatek,rdsel:
- description: |
+ description:
An integer describing the steps for input level shifter duty cycle
when asserted (high pulse width adjustment). Valid arguments are
from 0 to 63.
@@ -207,21 +217,20 @@ examples:
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
- i2c0_pins_a: i2c-0 {
+ i2c0_pins_a: i2c0-pins {
pins1 {
pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
<PINMUX_GPIO49__FUNC_SDA5>;
mediatek,pull-up-adv = <3>;
- mediatek,drive-strength-adv = <7>;
+ drive-strength-microamp = <1000>;
};
};
- i2c1_pins_a: i2c-1 {
+ i2c1_pins_a: i2c1-pins {
pins {
pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
<PINMUX_GPIO51__FUNC_SDA3>;
mediatek,pull-down-adv = <2>;
- mediatek,drive-strength-adv = <4>;
};
};
};