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-rw-r--r--dts/Bindings/pinctrl/st,stm32-pinctrl.yaml52
1 files changed, 36 insertions, 16 deletions
diff --git a/dts/Bindings/pinctrl/st,stm32-pinctrl.yaml b/dts/Bindings/pinctrl/st,stm32-pinctrl.yaml
index dfee6d38a7..e1eb45a9ed 100644
--- a/dts/Bindings/pinctrl/st,stm32-pinctrl.yaml
+++ b/dts/Bindings/pinctrl/st,stm32-pinctrl.yaml
@@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STM32 GPIO and Pin Mux/Config controller
maintainers:
- - Alexandre TORGUE <alexandre.torgue@st.com>
+ - Alexandre TORGUE <alexandre.torgue@foss.st.com>
description: |
STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware
@@ -27,6 +27,8 @@ properties:
- st,stm32mp135-pinctrl
- st,stm32mp157-pinctrl
- st,stm32mp157-z-pinctrl
+ - st,stm32mp257-pinctrl
+ - st,stm32mp257-z-pinctrl
'#address-cells':
const: 1
@@ -34,41 +36,50 @@ properties:
const: 1
ranges: true
- pins-are-numbered: true
+ pins-are-numbered:
+ $ref: /schemas/types.yaml#/definitions/flag
+ deprecated: true
hwlocks: true
interrupts:
maxItems: 1
st,syscfg:
- description: Should be phandle/offset/mask
- - Phandle to the syscon node which includes IRQ mux selection.
- - The offset of the IRQ mux selection register.
- - The field mask of IRQ mux, needed if different of 0xf.
- $ref: "/schemas/types.yaml#/definitions/phandle-array"
+ description: Phandle+args to the syscon node which includes IRQ mux selection.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - minItems: 2
+ items:
+ - description: syscon node which includes IRQ mux selection
+ - description: The offset of the IRQ mux selection register
+ - description: The field mask of IRQ mux, needed if different of 0xf
st,package:
description:
Indicates the SOC package used.
More details in include/dt-bindings/pinctrl/stm32-pinfunc.h
$ref: /schemas/types.yaml#/definitions/uint32
- enum: [1, 2, 4, 8]
+ enum: [0x1, 0x2, 0x4, 0x8, 0x100, 0x400, 0x800]
patternProperties:
'^gpio@[0-9a-f]*$':
type: object
+ additionalProperties: false
properties:
gpio-controller: true
'#gpio-cells':
const: 2
+ interrupt-controller: true
+ '#interrupt-cells':
+ const: 2
reg:
maxItems: 1
clocks:
maxItems: 1
- reset:
- minItems: 1
+ resets:
maxItems: 1
+ gpio-line-names: true
gpio-ranges:
minItems: 1
maxItems: 16
@@ -81,7 +92,7 @@ patternProperties:
st,bank-name:
description:
Should be a name string for this bank as specified in the datasheet.
- $ref: "/schemas/types.yaml#/definitions/string"
+ $ref: /schemas/types.yaml#/definitions/string
enum:
- GPIOA
- GPIOB
@@ -100,10 +111,16 @@ patternProperties:
description:
Should correspond to the EXTI IOport selection (EXTI line used
to select GPIOs as interrupts).
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 11
+ patternProperties:
+ "^(.+-hog(-[0-9]+)?)$":
+ type: object
+ required:
+ - gpio-hog
+
required:
- gpio-controller
- '#gpio-cells'
@@ -113,9 +130,12 @@ patternProperties:
'-[0-9]*$':
type: object
+ additionalProperties: false
+
patternProperties:
'^pins':
type: object
+ additionalProperties: false
description: |
A pinctrl node should contain at least one subnode representing the
pinctrl group available on the machine. Each subnode will list the
@@ -123,7 +143,7 @@ patternProperties:
configuration, pullups, drive, output high/low and output speed.
properties:
pinmux:
- $ref: "/schemas/types.yaml#/definitions/uint32-array"
+ $ref: /schemas/types.yaml#/definitions/uint32-array
description: |
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
@@ -183,12 +203,14 @@ patternProperties:
required:
- pinmux
+allOf:
+ - $ref: pinctrl.yaml#
+
required:
- compatible
- '#address-cells'
- '#size-cells'
- ranges
- - pins-are-numbered
additionalProperties: false
@@ -202,7 +224,6 @@ examples:
#size-cells = <1>;
compatible = "st,stm32f429-pinctrl";
ranges = <0 0x40020000 0x3000>;
- pins-are-numbered;
gpioa: gpio@0 {
gpio-controller;
@@ -220,7 +241,6 @@ examples:
#size-cells = <1>;
compatible = "st,stm32f429-pinctrl";
ranges = <0 0x50020000 0x3000>;
- pins-are-numbered;
gpiob: gpio@1000 {
gpio-controller;