diff options
Diffstat (limited to 'dts/Bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml')
| -rw-r--r-- | dts/Bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/dts/Bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml b/dts/Bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml index 8ef0d07d35..f13d315b5d 100644 --- a/dts/Bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml +++ b/dts/Bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml @@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Xilinx ZynqMP Pinctrl maintainers: - - Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> - - Rajan Vaja <rajan.vaja@xilinx.com> + - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> description: | Please refer to pinctrl-bindings.txt in this directory for details of the @@ -32,7 +31,7 @@ properties: const: xlnx,zynqmp-pinctrl patternProperties: - '^(.*-)?(default|gpio)$': + '^(.*-)?(default|gpio-grp)$': type: object patternProperties: '^mux': @@ -274,6 +273,10 @@ patternProperties: slew-rate: enum: [0, 1] + output-enable: + description: + This will internally disable the tri-state for MIO pins. + drive-strength: description: Selects the drive strength for MIO pins, in mA. @@ -290,6 +293,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: pinctrl.yaml# + required: - compatible |