diff options
Diffstat (limited to 'dts/Bindings/powerpc/fsl/cpus.txt')
| -rw-r--r-- | dts/Bindings/powerpc/fsl/cpus.txt | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/dts/Bindings/powerpc/fsl/cpus.txt b/dts/Bindings/powerpc/fsl/cpus.txt index d63ab1dec1..4787db8de2 100644 --- a/dts/Bindings/powerpc/fsl/cpus.txt +++ b/dts/Bindings/powerpc/fsl/cpus.txt @@ -5,7 +5,7 @@ Copyright 2013 Freescale Semiconductor Inc. Power Architecture CPUs in Freescale SOCs are represented in device trees as per the definition in the Devicetree Specification. -In addition to the the Devicetree Specification definitions, the properties +In addition to the Devicetree Specification definitions, the properties defined below may be present on CPU nodes. PROPERTIES @@ -28,6 +28,6 @@ PROPERTIES Snoop ID Port Mapping registers, which are part of the CoreNet Coherency fabric (CCF), provide a CoreNet Coherency Subdomain ID/CoreNet Snoop ID to cpu mapping functions. Certain bits from - these registers should be set if the coresponding CPU should be + these registers should be set if the corresponding CPU should be snooped. This property defines a bitmask which selects the bit that should be set if this cpu should be snooped. |