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-rw-r--r--dts/Bindings/powerpc/fsl/cpus.txt6
1 files changed, 3 insertions, 3 deletions
diff --git a/dts/Bindings/powerpc/fsl/cpus.txt b/dts/Bindings/powerpc/fsl/cpus.txt
index f8cd2397aa..d63ab1dec1 100644
--- a/dts/Bindings/powerpc/fsl/cpus.txt
+++ b/dts/Bindings/powerpc/fsl/cpus.txt
@@ -3,10 +3,10 @@ Power Architecture CPU Binding
Copyright 2013 Freescale Semiconductor Inc.
Power Architecture CPUs in Freescale SOCs are represented in device trees as
-per the definition in ePAPR.
+per the definition in the Devicetree Specification.
-In addition to the ePAPR definitions, the properties defined below may be
-present on CPU nodes.
+In addition to the the Devicetree Specification definitions, the properties
+defined below may be present on CPU nodes.
PROPERTIES