diff options
Diffstat (limited to 'dts/Bindings/riscv/cpus.yaml')
| -rw-r--r-- | dts/Bindings/riscv/cpus.yaml | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/dts/Bindings/riscv/cpus.yaml b/dts/Bindings/riscv/cpus.yaml index e534f6a7cf..aa5fb64d57 100644 --- a/dts/Bindings/riscv/cpus.yaml +++ b/dts/Bindings/riscv/cpus.yaml @@ -31,9 +31,7 @@ properties: - sifive,bullet0 - sifive,e5 - sifive,e7 - - sifive,e51 - sifive,e71 - - sifive,u54-mc - sifive,u74-mc - sifive,u54 - sifive,u74 @@ -41,6 +39,12 @@ properties: - sifive,u7 - canaan,k210 - const: riscv + - items: + - enum: + - sifive,e51 + - sifive,u54-mc + - const: sifive,rocket0 + - const: riscv - const: riscv # Simulator only description: Identifies that the hart uses the RISC-V instruction set |