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-rw-r--r--dts/Bindings/rtc/abracon,abx80x.txt1
-rw-r--r--dts/Bindings/rtc/cdns,rtc.txt25
-rw-r--r--dts/Bindings/rtc/isil,isl1208.txt38
-rw-r--r--dts/Bindings/rtc/isil,isl1219.txt29
-rw-r--r--dts/Bindings/rtc/nxp,pcf85063.txt18
-rw-r--r--dts/Bindings/rtc/nxp,pcf8523.txt18
-rw-r--r--dts/Bindings/rtc/rtc-meson.txt35
-rw-r--r--dts/Bindings/rtc/rtc.txt23
8 files changed, 150 insertions, 37 deletions
diff --git a/dts/Bindings/rtc/abracon,abx80x.txt b/dts/Bindings/rtc/abracon,abx80x.txt
index 18b892d..2405e35 100644
--- a/dts/Bindings/rtc/abracon,abx80x.txt
+++ b/dts/Bindings/rtc/abracon,abx80x.txt
@@ -16,6 +16,7 @@ Required properties:
"abracon,ab1803"
"abracon,ab1804"
"abracon,ab1805"
+ "microcrystal,rv1805"
Using "abracon,abx80x" will enable chip autodetection.
- "reg": I2C bus address of the device
diff --git a/dts/Bindings/rtc/cdns,rtc.txt b/dts/Bindings/rtc/cdns,rtc.txt
new file mode 100644
index 0000000..14a0448
--- /dev/null
+++ b/dts/Bindings/rtc/cdns,rtc.txt
@@ -0,0 +1,25 @@
+Cadence Real Time Clock
+
+The Cadence RTC controller with date, time and alarm capabilities.
+The alarm may wake the system from low-power state.
+
+Required properties:
+- compatible: Should be "cdns,rtc-r109v3"
+- reg: Specifies base physical address and size of the register area.
+- interrupts: A single interrupt specifier.
+- clocks: Must contain two entries:
+ - pclk: APB registers clock
+ - ref_clk: reference 1Hz or 100Hz clock, depending on IP configuration
+ See ../clocks/clock-bindings.txt for details.
+
+Example:
+ rtc0: rtc@fd080000 {
+ compatible = "cdns,rtc-r109v3";
+ reg = <0xfd080000 0x1000>;
+
+ clock-names = "pclk", "ref_clk";
+ clocks = <&sysclock>, <&refclock>;
+
+ interrupt-parent = <&gic>;
+ interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
+ };
diff --git a/dts/Bindings/rtc/isil,isl1208.txt b/dts/Bindings/rtc/isil,isl1208.txt
new file mode 100644
index 0000000..51f0030
--- /dev/null
+++ b/dts/Bindings/rtc/isil,isl1208.txt
@@ -0,0 +1,38 @@
+Intersil ISL1209/19 I2C RTC/Alarm chip with event in
+
+ISL12X9 have additional pins EVIN and #EVDET for tamper detection, while the
+ISL1208 and ISL1218 do not. They are all use the same driver with the bindings
+described here, with chip specific properties as noted.
+
+Required properties supported by the device:
+ - "compatible": Should be one of the following:
+ - "isil,isl1208"
+ - "isil,isl1209"
+ - "isil,isl1218"
+ - "isil,isl1219"
+ - "reg": I2C bus address of the device
+
+Optional properties:
+ - "interrupt-names": list which may contains "irq" and "evdet"
+ evdet applies to isl1209 and isl1219 only
+ - "interrupts": list of interrupts for "irq" and "evdet"
+ evdet applies to isl1209 and isl1219 only
+ - "isil,ev-evienb": Enable or disable internal pull on EVIN pin
+ Applies to isl1209 and isl1219 only
+ Possible values are 0 and 1
+ Value 0 enables internal pull-up on evin pin, 1 disables it.
+ Default will leave the non-volatile configuration of the pullup
+ as is.
+
+Example isl1219 node with #IRQ pin connected to SoC gpio1 pin12 and #EVDET pin
+connected to SoC gpio2 pin 24 and internal pull-up enabled in EVIN pin.
+
+ isl1219: rtc@68 {
+ compatible = "isil,isl1219";
+ reg = <0x68>;
+ interrupt-names = "irq", "evdet";
+ interrupts-extended = <&gpio1 12 IRQ_TYPE_EDGE_FALLING>,
+ <&gpio2 24 IRQ_TYPE_EDGE_FALLING>;
+ isil,ev-evienb = <1>;
+ };
+
diff --git a/dts/Bindings/rtc/isil,isl1219.txt b/dts/Bindings/rtc/isil,isl1219.txt
deleted file mode 100644
index c3efd48..0000000
--- a/dts/Bindings/rtc/isil,isl1219.txt
+++ /dev/null
@@ -1,29 +0,0 @@
-Intersil ISL1219 I2C RTC/Alarm chip with event in
-
-ISL1219 has additional pins EVIN and #EVDET for tamper detection.
-
-Required properties supported by the device:
-
- - "compatible": must be "isil,isl1219"
- - "reg": I2C bus address of the device
-
-Optional properties:
-
- - "interrupt-names": list which may contains "irq" and "evdet"
- - "interrupts": list of interrupts for "irq" and "evdet"
- - "isil,ev-evienb": if present EV.EVIENB bit is set to the specified
- value for proper operation.
-
-
-Example isl1219 node with #IRQ pin connected to SoC gpio1 pin12
- and #EVDET pin connected to SoC gpio2 pin 24:
-
- isl1219: rtc@68 {
- compatible = "isil,isl1219";
- reg = <0x68>;
- interrupt-names = "irq", "evdet";
- interrupts-extended = <&gpio1 12 IRQ_TYPE_EDGE_FALLING>,
- <&gpio2 24 IRQ_TYPE_EDGE_FALLING>;
- isil,ev-evienb = <1>;
- };
-
diff --git a/dts/Bindings/rtc/nxp,pcf85063.txt b/dts/Bindings/rtc/nxp,pcf85063.txt
new file mode 100644
index 0000000..d3e380a
--- /dev/null
+++ b/dts/Bindings/rtc/nxp,pcf85063.txt
@@ -0,0 +1,18 @@
+* NXP PCF85063 Real Time Clock
+
+Required properties:
+- compatible: Should contain "nxp,pcf85063".
+- reg: I2C address for chip.
+
+Optional property:
+- quartz-load-femtofarads: The capacitive load of the quartz(x-tal),
+ expressed in femto Farad (fF). Valid values are 7000 and 12500.
+ Default value (if no value is specified) is 7000fF.
+
+Example:
+
+pcf85063: rtc@51 {
+ compatible = "nxp,pcf85063";
+ reg = <0x51>;
+ quartz-load-femtofarads = <12500>;
+};
diff --git a/dts/Bindings/rtc/nxp,pcf8523.txt b/dts/Bindings/rtc/nxp,pcf8523.txt
new file mode 100644
index 0000000..0b1080c
--- /dev/null
+++ b/dts/Bindings/rtc/nxp,pcf8523.txt
@@ -0,0 +1,18 @@
+* NXP PCF8523 Real Time Clock
+
+Required properties:
+- compatible: Should contain "nxp,pcf8523".
+- reg: I2C address for chip.
+
+Optional property:
+- quartz-load-femtofarads: The capacitive load of the quartz(x-tal),
+ expressed in femto Farad (fF). Valid values are 7000 and 12500.
+ Default value (if no value is specified) is 12500fF.
+
+Example:
+
+pcf8523: rtc@68 {
+ compatible = "nxp,pcf8523";
+ reg = <0x68>;
+ quartz-load-femtofarads = <7000>;
+};
diff --git a/dts/Bindings/rtc/rtc-meson.txt b/dts/Bindings/rtc/rtc-meson.txt
new file mode 100644
index 0000000..e921fe6
--- /dev/null
+++ b/dts/Bindings/rtc/rtc-meson.txt
@@ -0,0 +1,35 @@
+* Amlogic Meson6, Meson8, Meson8b and Meson8m2 RTC
+
+Required properties:
+- compatible: should be one of the following describing the hardware:
+ * "amlogic,meson6-rtc"
+ * "amlogic,meson8-rtc"
+ * "amlogic,meson8b-rtc"
+ * "amlogic,meson8m2-rtc"
+
+- reg: physical register space for the controller's memory mapped registers.
+- interrupts: the interrupt line of the RTC block.
+- clocks: reference to the external 32.768kHz crystal oscillator.
+- vdd-supply: reference to the power supply of the RTC block.
+- resets: reset controller reference to allow reset of the controller
+
+Optional properties for the battery-backed non-volatile memory:
+- #address-cells: should be 1 to address the battery-backed non-volatile memory
+- #size-cells: should be 1 to reference the battery-backed non-volatile memory
+
+Optional child nodes:
+- see ../nvmem/nvmem.txt
+
+Example:
+
+ rtc: rtc@740 {
+ compatible = "amlogic,meson6-rtc";
+ reg = <0x740 0x14>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&rtc32k_xtal>;
+ vdd-supply = <&rtc_vdd>;
+ resets = <&reset RESET_RTC>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
diff --git a/dts/Bindings/rtc/rtc.txt b/dts/Bindings/rtc/rtc.txt
index 7c8da69..f4687c6 100644
--- a/dts/Bindings/rtc/rtc.txt
+++ b/dts/Bindings/rtc/rtc.txt
@@ -21,12 +21,16 @@ Optional properties
The following properties may not be supported by all drivers. However, if a
driver wants to support one of the below features, it should adapt the bindings
below.
-- trickle-resistor-ohms : Selected resistor for trickle charger. Should be given
- if trickle charger should be enabled
-- trickle-diode-disable : Do not use internal trickle charger diode Should be
- given if internal trickle charger diode should be
- disabled
-- wakeup-source : Enables wake up of host system on alarm
+- trickle-resistor-ohms : Selected resistor for trickle charger. Should be given
+ if trickle charger should be enabled
+- trickle-diode-disable : Do not use internal trickle charger diode Should be
+ given if internal trickle charger diode should be
+ disabled
+- wakeup-source : Enables wake up of host system on alarm
+- quartz-load-femtofarads : The capacitive load of the quartz(x-tal),
+ expressed in femto Farad (fF).
+ The default value shall be listed (if optional),
+ and likewise all valid values.
Trivial RTCs
------------
@@ -39,21 +43,23 @@ possibly an interrupt line.
Compatible Vendor / Chip
========== =============
abracon,abb5zes3 AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface
+abracon,abeoz9 AB-RTCMC-32.768kHz-EOZ9: Real Time Clock/Calendar Module with I2C Interface
dallas,ds1374 I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output
dallas,ds1672 Dallas DS1672 Real-time Clock
dallas,ds3232 Extremely Accurate I²C RTC with Integrated Crystal and SRAM
epson,rx8010 I2C-BUS INTERFACE REAL TIME CLOCK MODULE
+epson,rx8571 I2C-BUS INTERFACE REAL TIME CLOCK MODULE with Battery Backed RAM
epson,rx8581 I2C-BUS INTERFACE REAL TIME CLOCK MODULE
emmicro,em3027 EM Microelectronic EM3027 Real-time Clock
isil,isl1208 Intersil ISL1208 Low Power RTC with Battery Backed SRAM
isil,isl1218 Intersil ISL1218 Low Power RTC with Battery Backed SRAM
isil,isl12022 Intersil ISL12022 Real-time Clock
+microcrystal,rv3028 Real Time Clock Module with I2C-Bus
microcrystal,rv3029 Real Time Clock Module with I2C-Bus
+microcrystal,rv8523 Real Time Clock
nxp,pcf2127 Real-time clock
nxp,pcf2129 Real-time clock
-nxp,pcf8523 Real-time Clock
nxp,pcf8563 Real-time clock/calendar
-nxp,pcf85063 Tiny Real-Time Clock
pericom,pt7c4338 Real-time Clock Module
ricoh,r2025sd I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
ricoh,r2221tl I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
@@ -62,3 +68,4 @@ ricoh,rs5c372b I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
ricoh,rv5c386 I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
ricoh,rv5c387a I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
sii,s35390a 2-wire CMOS real-time clock
+whwave,sd3078 I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC