12 files changed, 30 insertions, 16 deletions
diff --git a/dts/Bindings/rtc/brcm,brcmstb-waketimer.txt b/dts/Bindings/rtc/brcm,brcmstb-waketimer.txt
index 1d990bcc0b..d946f28502 100644
--- a/dts/Bindings/rtc/brcm,brcmstb-waketimer.txt
+++ b/dts/Bindings/rtc/brcm,brcmstb-waketimer.txt
@@ -7,8 +7,6 @@ Required properties:
 - compatible     : should contain "brcm,brcmstb-waketimer"
 - reg            : the register start and length for the WKTMR block
 - interrupts     : The TIMER interrupt
-- interrupt-parent: The phandle to the Always-On (AON) Power Management (PM) L2
-                    interrupt controller node
 - clocks	 : The phandle to the UPG fixed clock (27Mhz domain)
 
 Example:
diff --git a/dts/Bindings/rtc/isil,isl12057.txt b/dts/Bindings/rtc/isil,isl12057.txt
index fbbdd92e5a..ff7c435551 100644
--- a/dts/Bindings/rtc/isil,isl12057.txt
+++ b/dts/Bindings/rtc/isil,isl12057.txt
@@ -25,9 +25,6 @@ Optional properties:
  - "wakeup-source": mark the chip as a wakeup source, independently of
     the availability of an IRQ line connected to the SoC.
 
- - "interrupt-parent", "interrupts": for passing the interrupt line
-   of the SoC connected to IRQ#2 of the RTC chip.
-
 
 Example isl12057 node without IRQ#2 pin connected (no alarm support):
 
diff --git a/dts/Bindings/rtc/isil,isl1219.txt b/dts/Bindings/rtc/isil,isl1219.txt
new file mode 100644
index 0000000000..c3efd48e91
--- /dev/null
+++ b/dts/Bindings/rtc/isil,isl1219.txt
@@ -0,0 +1,29 @@
+Intersil ISL1219 I2C RTC/Alarm chip with event in
+
+ISL1219 has additional pins EVIN and #EVDET for tamper detection.
+
+Required properties supported by the device:
+
+ - "compatible": must be "isil,isl1219"
+ - "reg": I2C bus address of the device
+
+Optional properties:
+
+ - "interrupt-names": list which may contains "irq" and "evdet"
+ - "interrupts": list of interrupts for "irq" and "evdet"
+ - "isil,ev-evienb": if present EV.EVIENB bit is set to the specified
+                     value for proper operation.
+
+
+Example isl1219 node with #IRQ pin connected to SoC gpio1 pin12
+ and #EVDET pin connected to SoC gpio2 pin 24:
+
+	isl1219: rtc@68 {
+		compatible = "isil,isl1219";
+		reg = <0x68>;
+		interrupt-names = "irq", "evdet";
+		interrupts-extended = <&gpio1 12 IRQ_TYPE_EDGE_FALLING>,
+			<&gpio2 24 IRQ_TYPE_EDGE_FALLING>;
+		isil,ev-evienb = <1>;
+	};
+
diff --git a/dts/Bindings/rtc/rtc-cmos.txt b/dts/Bindings/rtc/rtc-cmos.txt
index 7382989b30..b94b35f360 100644
--- a/dts/Bindings/rtc/rtc-cmos.txt
+++ b/dts/Bindings/rtc/rtc-cmos.txt
@@ -7,7 +7,6 @@ Required properties:
 
 Optional properties:
   - interrupts : should contain interrupt.
-  - interrupt-parent : interrupt source phandle.
   - ctrl-reg : Contains the initial value of the control register also
     called "Register B".
   - freq-reg : Contains the initial value of the frequency register also
diff --git a/dts/Bindings/rtc/rtc-ds1307.txt b/dts/Bindings/rtc/rtc-ds1307.txt
index d28d6e7f6a..eebfbe0420 100644
--- a/dts/Bindings/rtc/rtc-ds1307.txt
+++ b/dts/Bindings/rtc/rtc-ds1307.txt
@@ -13,6 +13,7 @@ Required properties:
 	"maxim,ds3231",
 	"st,m41t0",
 	"st,m41t00",
+	"st,m41t11",
 	"microchip,mcp7940x",
 	"microchip,mcp7941x",
 	"pericom,pt7c4338",
@@ -21,7 +22,6 @@ Required properties:
 - reg: I2C bus address of the device
 
 Optional properties:
-- interrupt-parent: phandle for the interrupt controller.
 - interrupts: rtc alarm interrupt.
 - clock-output-names: From common clock binding to override the default output
                       clock name
diff --git a/dts/Bindings/rtc/rtc-m41t80.txt b/dts/Bindings/rtc/rtc-m41t80.txt
index 717d93860a..c746cb2212 100644
--- a/dts/Bindings/rtc/rtc-m41t80.txt
+++ b/dts/Bindings/rtc/rtc-m41t80.txt
@@ -16,7 +16,6 @@ Required properties:
 - reg: I2C bus address of the device
 
 Optional properties:
-- interrupt-parent: phandle for the interrupt controller.
 - interrupts: rtc alarm interrupt.
 - clock-output-names: From common clock binding to override the default output
                       clock name
diff --git a/dts/Bindings/rtc/rtc-omap.txt b/dts/Bindings/rtc/rtc-omap.txt
index bee41f9704..062ebb14ce 100644
--- a/dts/Bindings/rtc/rtc-omap.txt
+++ b/dts/Bindings/rtc/rtc-omap.txt
@@ -11,7 +11,6 @@ Required properties:
 	- "ti,am4372-rtc" - for RTC IP used similar to that on AM437X SoC family.
 - reg: Address range of rtc register set
 - interrupts: rtc timer, alarm interrupts in order
-- interrupt-parent: phandle for the interrupt controller
 
 Optional properties:
 - system-power-controller: whether the rtc is controlling the system power
diff --git a/dts/Bindings/rtc/rtc-palmas.txt b/dts/Bindings/rtc/rtc-palmas.txt
index eb1c7fdeb4..c6cf37758a 100644
--- a/dts/Bindings/rtc/rtc-palmas.txt
+++ b/dts/Bindings/rtc/rtc-palmas.txt
@@ -3,7 +3,6 @@ Palmas RTC controller bindings
 Required properties:
 - compatible:
   - "ti,palmas-rtc" for palma series of the RTC controller
-- interrupt-parent: Parent interrupt device, must be handle of palmas node.
 - interrupts: Interrupt number of RTC submodule on device.
 
 Optional properties:
diff --git a/dts/Bindings/rtc/spear-rtc.txt b/dts/Bindings/rtc/spear-rtc.txt
index ca67ac6210..fecf8e4ad4 100644
--- a/dts/Bindings/rtc/spear-rtc.txt
+++ b/dts/Bindings/rtc/spear-rtc.txt
@@ -3,8 +3,6 @@
 Required properties:
 - compatible : "st,spear600-rtc"
 - reg : Address range of the rtc registers
-- interrupt-parent: Should be the phandle for the interrupt controller
-  that services interrupts for this device
 - interrupt: Should contain the rtc interrupt number
 
 Example:
diff --git a/dts/Bindings/rtc/sprd,sc27xx-rtc.txt b/dts/Bindings/rtc/sprd,sc27xx-rtc.txt
index 7c170da0d4..1f5754299d 100644
--- a/dts/Bindings/rtc/sprd,sc27xx-rtc.txt
+++ b/dts/Bindings/rtc/sprd,sc27xx-rtc.txt
@@ -3,7 +3,6 @@ Spreadtrum SC27xx Real Time Clock
 Required properties:
 - compatible: should be "sprd,sc2731-rtc".
 - reg: address offset of rtc register.
-- interrupt-parent: phandle for the interrupt controller.
 - interrupts: rtc alarm interrupt.
 
 Example:
diff --git a/dts/Bindings/rtc/st,stm32-rtc.txt b/dts/Bindings/rtc/st,stm32-rtc.txt
index c920e27369..130ca5b982 100644
--- a/dts/Bindings/rtc/st,stm32-rtc.txt
+++ b/dts/Bindings/rtc/st,stm32-rtc.txt
@@ -13,8 +13,6 @@ Required properties:
     It is required on stm32(h7/mp1).
 - clock-names: must be "rtc_ck" and "pclk".
     It is required on stm32(h7/mp1).
-- interrupt-parent: phandle for the interrupt controller.
-    It is required on stm32(f4/f7/h7).
 - interrupts: rtc alarm interrupt. On stm32mp1, a second interrupt is required
   for rtc alarm wakeup interrupt.
 - st,syscfg: phandle/offset/mask triplet. The phandle to pwrcfg used to
diff --git a/dts/Bindings/rtc/stericsson,coh901331.txt b/dts/Bindings/rtc/stericsson,coh901331.txt
index 3ebeb31133..e615a897b2 100644
--- a/dts/Bindings/rtc/stericsson,coh901331.txt
+++ b/dts/Bindings/rtc/stericsson,coh901331.txt
@@ -3,7 +3,6 @@ ST-Ericsson COH 901 331 Real Time Clock
 Required properties:
 - compatible: must be "stericsson,coh901331"
 - reg: address range of rtc register set.
-- interrupt-parent: phandle for the interrupt controller.
 - interrupts: rtc alarm interrupt.
 - clocks: phandle to the rtc clock source