diff options
Diffstat (limited to 'dts/Bindings/serial')
| -rw-r--r-- | dts/Bindings/serial/atmel-usart.txt | 3 | ||||
| -rw-r--r-- | dts/Bindings/serial/axis,etraxfs-uart.txt | 6 | ||||
| -rw-r--r-- | dts/Bindings/serial/ingenic,uart.txt | 3 | ||||
| -rw-r--r-- | dts/Bindings/serial/mrvl,pxa-ssp.txt | 1 | ||||
| -rw-r--r-- | dts/Bindings/serial/mtk-uart.txt | 6 | ||||
| -rw-r--r-- | dts/Bindings/serial/omap_serial.txt | 3 | ||||
| -rw-r--r-- | dts/Bindings/serial/pl011.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/serial/qcom,msm-uartdm.txt | 6 | ||||
| -rw-r--r-- | dts/Bindings/serial/renesas,sci-serial.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/serial/snps-dw-apb-uart.txt | 3 |
10 files changed, 29 insertions, 6 deletions
diff --git a/dts/Bindings/serial/atmel-usart.txt b/dts/Bindings/serial/atmel-usart.txt index 90787aa2e6..e6e6142e33 100644 --- a/dts/Bindings/serial/atmel-usart.txt +++ b/dts/Bindings/serial/atmel-usart.txt @@ -22,6 +22,8 @@ Optional properties: memory peripheral interface and USART DMA channel ID, FIFO configuration. Refer to dma.txt and atmel-dma.txt for details. - dma-names: "rx" for RX channel, "tx" for TX channel. +- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO + capable USARTs. <chip> compatible description: - at91rm9200: legacy USART support @@ -57,4 +59,5 @@ Example: dmas = <&dma0 2 0x3>, <&dma0 2 0x204>; dma-names = "tx", "rx"; + atmel,fifo-size = <32>; }; diff --git a/dts/Bindings/serial/axis,etraxfs-uart.txt b/dts/Bindings/serial/axis,etraxfs-uart.txt index ebcbb62c0a..51b3c9e80a 100644 --- a/dts/Bindings/serial/axis,etraxfs-uart.txt +++ b/dts/Bindings/serial/axis,etraxfs-uart.txt @@ -6,7 +6,7 @@ Required properties: - interrupts: device interrupt Optional properties: -- {dtr,dsr,ri,cd}-gpios: specify a GPIO for DTR/DSR/RI/CD +- {dtr,dsr,rng,dcd}-gpios: specify a GPIO for DTR/DSR/RI/DCD line respectively. Example: @@ -16,4 +16,8 @@ serial@b00260000 { reg = <0xb0026000 0x1000>; interrupts = <68>; status = "disabled"; + dtr-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>; + dsr-gpios = <&sysgpio 1 GPIO_ACTIVE_LOW>; + rng-gpios = <&sysgpio 2 GPIO_ACTIVE_LOW>; + dcd-gpios = <&sysgpio 3 GPIO_ACTIVE_LOW>; }; diff --git a/dts/Bindings/serial/ingenic,uart.txt b/dts/Bindings/serial/ingenic,uart.txt index c2d3b3abe7..02cb7fe59c 100644 --- a/dts/Bindings/serial/ingenic,uart.txt +++ b/dts/Bindings/serial/ingenic,uart.txt @@ -1,7 +1,8 @@ * Ingenic SoC UART Required properties: -- compatible : "ingenic,jz4740-uart" or "ingenic,jz4780-uart" +- compatible : "ingenic,jz4740-uart", "ingenic,jz4760-uart", + "ingenic,jz4775-uart" or "ingenic,jz4780-uart" - reg : offset and length of the register set for the device. - interrupts : should contain uart interrupt. - clocks : phandles to the module & baud clocks. diff --git a/dts/Bindings/serial/mrvl,pxa-ssp.txt b/dts/Bindings/serial/mrvl,pxa-ssp.txt index 669b8140dd..d10cc06c0c 100644 --- a/dts/Bindings/serial/mrvl,pxa-ssp.txt +++ b/dts/Bindings/serial/mrvl,pxa-ssp.txt @@ -10,7 +10,6 @@ Required properties: mvrl,pxa168-ssp mrvl,pxa910-ssp mrvl,ce4100-ssp - mrvl,lpss-ssp - reg: The memory base - dmas: Two dma phandles, one for rx, one for tx diff --git a/dts/Bindings/serial/mtk-uart.txt b/dts/Bindings/serial/mtk-uart.txt index 8d63f1da07..2d47add347 100644 --- a/dts/Bindings/serial/mtk-uart.txt +++ b/dts/Bindings/serial/mtk-uart.txt @@ -5,10 +5,12 @@ Required properties: * "mediatek,mt8135-uart" for MT8135 compatible UARTS * "mediatek,mt8127-uart" for MT8127 compatible UARTS * "mediatek,mt8173-uart" for MT8173 compatible UARTS + * "mediatek,mt6795-uart" for MT6795 compatible UARTS * "mediatek,mt6589-uart" for MT6589 compatible UARTS * "mediatek,mt6582-uart" for MT6582 compatible UARTS - * "mediatek,mt6577-uart" for all compatible UARTS (MT8173, MT6589, MT6582, - MT6577) + * "mediatek,mt6580-uart" for MT6580 compatible UARTS + * "mediatek,mt6577-uart" for all compatible UARTS (MT8173, MT6795, + MT6589, MT6582, MT6580, MT6577) - reg: The base address of the UART register bank. diff --git a/dts/Bindings/serial/omap_serial.txt b/dts/Bindings/serial/omap_serial.txt index 54c2a155c7..7a71b5de77 100644 --- a/dts/Bindings/serial/omap_serial.txt +++ b/dts/Bindings/serial/omap_serial.txt @@ -4,6 +4,9 @@ Required properties: - compatible : should be "ti,omap2-uart" for OMAP2 controllers - compatible : should be "ti,omap3-uart" for OMAP3 controllers - compatible : should be "ti,omap4-uart" for OMAP4 controllers +- compatible : should be "ti,am4372-uart" for AM437x controllers +- compatible : should be "ti,am3352-uart" for AM335x controllers +- compatible : should be "ti,dra742-uart" for DRA7x controllers - reg : address and length of the register space - interrupts or interrupts-extended : Should contain the uart interrupt specifier or both the interrupt diff --git a/dts/Bindings/serial/pl011.txt b/dts/Bindings/serial/pl011.txt index cbae3d9a02..77863aefe9 100644 --- a/dts/Bindings/serial/pl011.txt +++ b/dts/Bindings/serial/pl011.txt @@ -19,7 +19,7 @@ Optional properties: must correspond to the PCLK clocking the internal logic of the block. Just listing one clock (the first one) is deprecated. -- clocks-names: +- clock-names: When present, the first clock listed must be named "uartclk" and the second clock listed must be named "apb_pclk" diff --git a/dts/Bindings/serial/qcom,msm-uartdm.txt b/dts/Bindings/serial/qcom,msm-uartdm.txt index a2114c2173..182777fac9 100644 --- a/dts/Bindings/serial/qcom,msm-uartdm.txt +++ b/dts/Bindings/serial/qcom,msm-uartdm.txt @@ -26,6 +26,12 @@ Required properties: Optional properties: - dmas: Should contain dma specifiers for transmit and receive channels - dma-names: Should contain "tx" for transmit and "rx" for receive channels +- qcom,tx-crci: Identificator <u32> for Client Rate Control Interface to be + used with TX DMA channel. Required when using DMA for transmission + with UARTDM v1.3 and bellow. +- qcom,rx-crci: Identificator <u32> for Client Rate Control Interface to be + used with RX DMA channel. Required when using DMA for reception + with UARTDM v1.3 and bellow. Note: Aliases may be defined to ensure the correct ordering of the UARTs. The alias serialN will result in the UART being assigned port N. If any diff --git a/dts/Bindings/serial/renesas,sci-serial.txt b/dts/Bindings/serial/renesas,sci-serial.txt index e84b13a8ed..73f825e5e6 100644 --- a/dts/Bindings/serial/renesas,sci-serial.txt +++ b/dts/Bindings/serial/renesas,sci-serial.txt @@ -23,6 +23,8 @@ Required properties: - "renesas,scifa-r8a7794" for R8A7794 (R-Car E2) SCIFA compatible UART. - "renesas,scifb-r8a7794" for R8A7794 (R-Car E2) SCIFB compatible UART. - "renesas,hscif-r8a7794" for R8A7794 (R-Car E2) HSCIF compatible UART. + - "renesas,scif-r8a7795" for R8A7795 (R-Car H3) SCIF compatible UART. + - "renesas,hscif-r8a7795" for R8A7795 (R-Car H3) HSCIF compatible UART. - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART. - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART. - "renesas,scif" for generic SCIF compatible UART. diff --git a/dts/Bindings/serial/snps-dw-apb-uart.txt b/dts/Bindings/serial/snps-dw-apb-uart.txt index 289c40ed74..12bbe9f225 100644 --- a/dts/Bindings/serial/snps-dw-apb-uart.txt +++ b/dts/Bindings/serial/snps-dw-apb-uart.txt @@ -15,6 +15,9 @@ The supplying peripheral clock can also be handled, needing a second property Required elements: "baudclk", "apb_pclk" Optional properties: +- snps,uart-16550-compatible : reflects the value of UART_16550_COMPATIBLE + configuration parameter. Define this if your UART does not implement the busy + functionality. - resets : phandle to the parent reset controller. - reg-shift : quantity to shift the register offsets by. If this property is not present then the register offsets are not shifted. |