diff options
Diffstat (limited to 'dts/Bindings/sound/renesas,rz-ssi.yaml')
| -rw-r--r-- | dts/Bindings/sound/renesas,rz-ssi.yaml | 32 |
1 files changed, 20 insertions, 12 deletions
diff --git a/dts/Bindings/sound/renesas,rz-ssi.yaml b/dts/Bindings/sound/renesas,rz-ssi.yaml index 414ff8035a..8b9695f5de 100644 --- a/dts/Bindings/sound/renesas,rz-ssi.yaml +++ b/dts/Bindings/sound/renesas,rz-ssi.yaml @@ -4,30 +4,39 @@ $id: http://devicetree.org/schemas/sound/renesas,rz-ssi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Renesas RZ/G2L ASoC Sound Serial Interface (SSIF-2) +title: Renesas RZ/{G2L,V2L} ASoC Sound Serial Interface (SSIF-2) maintainers: - Biju Das <biju.das.jz@bp.renesas.com> +allOf: + - $ref: dai-common.yaml# + properties: compatible: items: - enum: + - renesas,r9a07g043-ssi # RZ/G2UL and RZ/Five - renesas,r9a07g044-ssi # RZ/G2{L,LC} + - renesas,r9a07g054-ssi # RZ/V2L - const: renesas,rz-ssi reg: maxItems: 1 interrupts: - maxItems: 4 + minItems: 2 + maxItems: 3 interrupt-names: - items: - - const: int_req - - const: dma_rx - - const: dma_tx - - const: dma_rt + oneOf: + - items: + - const: int_req + - const: dma_rx + - const: dma_tx + - items: + - const: int_req + - const: dma_rt clocks: maxItems: 4 @@ -49,7 +58,7 @@ properties: minItems: 1 maxItems: 2 description: - The first cell represents a phandle to dmac + The first cell represents a phandle to dmac. The second cell specifies the encoded MID/RID values of the SSI port connected to the DMA client and the slave channel configuration parameters. @@ -88,7 +97,7 @@ required: - resets - '#sound-dai-cells' -additionalProperties: false +unevaluatedProperties: false examples: - | @@ -101,9 +110,8 @@ examples: reg = <0x10049c00 0x400>; interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 327 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 329 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt"; + <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "int_req", "dma_rx", "dma_tx"; clocks = <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>, <&cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR>, <&audio_clk1>, |