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-rw-r--r--dts/Bindings/sound/davinci-mcasp-audio.txt1
-rw-r--r--dts/Bindings/sound/fsl,rpmsg.yaml1
-rw-r--r--dts/Bindings/sound/ics43432.txt6
-rw-r--r--dts/Bindings/sound/mt8195-afe-pcm.yaml182
-rw-r--r--dts/Bindings/sound/mt8195-mt6359-rt1019-rt5682.yaml47
-rw-r--r--dts/Bindings/sound/qcom,sm8250.yaml6
-rw-r--r--dts/Bindings/sound/realtek,rt1015p.yaml4
-rw-r--r--dts/Bindings/sound/renesas,rz-ssi.yaml118
-rw-r--r--dts/Bindings/sound/rockchip-i2s.yaml11
-rw-r--r--dts/Bindings/sound/rockchip-spdif.yaml1
-rw-r--r--dts/Bindings/sound/st,stm32-sai.yaml2
-rw-r--r--dts/Bindings/sound/ti,j721e-cpb-audio.yaml2
-rw-r--r--dts/Bindings/sound/ti,j721e-cpb-ivi-audio.yaml2
-rw-r--r--dts/Bindings/sound/tlv320adcx140.yaml8
14 files changed, 375 insertions, 16 deletions
diff --git a/dts/Bindings/sound/davinci-mcasp-audio.txt b/dts/Bindings/sound/davinci-mcasp-audio.txt
index c483dcec01..bd863bd695 100644
--- a/dts/Bindings/sound/davinci-mcasp-audio.txt
+++ b/dts/Bindings/sound/davinci-mcasp-audio.txt
@@ -6,6 +6,7 @@ Required properties:
"ti,da830-mcasp-audio" : for both DA830 & DA850 platforms
"ti,am33xx-mcasp-audio" : for AM33xx platforms (AM33xx, AM43xx, TI81xx)
"ti,dra7-mcasp-audio" : for DRA7xx platforms
+ "ti,omap4-mcasp-audio" : for OMAP4
- reg : Should contain reg specifiers for the entries in the reg-names property.
- reg-names : Should contain:
diff --git a/dts/Bindings/sound/fsl,rpmsg.yaml b/dts/Bindings/sound/fsl,rpmsg.yaml
index 61802a11ba..d370c98a62 100644
--- a/dts/Bindings/sound/fsl,rpmsg.yaml
+++ b/dts/Bindings/sound/fsl,rpmsg.yaml
@@ -21,6 +21,7 @@ properties:
- fsl,imx8mn-rpmsg-audio
- fsl,imx8mm-rpmsg-audio
- fsl,imx8mp-rpmsg-audio
+ - fsl,imx8ulp-rpmsg-audio
model:
$ref: /schemas/types.yaml#/definitions/string
diff --git a/dts/Bindings/sound/ics43432.txt b/dts/Bindings/sound/ics43432.txt
index b02e3a6c0f..e6f05f2f6c 100644
--- a/dts/Bindings/sound/ics43432.txt
+++ b/dts/Bindings/sound/ics43432.txt
@@ -1,4 +1,4 @@
-Invensense ICS-43432 MEMS microphone with I2S output.
+Invensense ICS-43432-compatible MEMS microphone with I2S output.
There are no software configuration options for this device, indeed, the only
host connection is the I2S interface. Apart from requirements on clock
@@ -8,7 +8,9 @@ contain audio data. A hardware pin determines if the device outputs data
on the left or right channel of the I2S frame.
Required properties:
- - compatible : Must be "invensense,ics43432"
+ - compatible: should be one of the following.
+ "invensense,ics43432": For the Invensense ICS43432
+ "cui,cmm-4030d-261": For the CUI CMM-4030D-261-I2S-TR
Example:
diff --git a/dts/Bindings/sound/mt8195-afe-pcm.yaml b/dts/Bindings/sound/mt8195-afe-pcm.yaml
new file mode 100644
index 0000000000..dcf790b053
--- /dev/null
+++ b/dts/Bindings/sound/mt8195-afe-pcm.yaml
@@ -0,0 +1,182 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/mt8195-afe-pcm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek AFE PCM controller for mt8195
+
+maintainers:
+ - Trevor Wu <trevor.wu@mediatek.com>
+
+properties:
+ compatible:
+ const: mediatek,mt8195-audio
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ mediatek,topckgen:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of the mediatek topckgen controller
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: 26M clock
+ - description: audio pll1 clock
+ - description: audio pll2 clock
+ - description: clock divider for i2si1_mck
+ - description: clock divider for i2si2_mck
+ - description: clock divider for i2so1_mck
+ - description: clock divider for i2so2_mck
+ - description: clock divider for dptx_mck
+ - description: a1sys hoping clock
+ - description: audio intbus clock
+ - description: audio hires clock
+ - description: audio local bus clock
+ - description: mux for dptx_mck
+ - description: mux for i2so1_mck
+ - description: mux for i2so2_mck
+ - description: mux for i2si1_mck
+ - description: mux for i2si2_mck
+ - description: audio infra 26M clock
+ - description: infra bus clock
+
+ clock-names:
+ items:
+ - const: clk26m
+ - const: apll1_ck
+ - const: apll2_ck
+ - const: apll12_div0
+ - const: apll12_div1
+ - const: apll12_div2
+ - const: apll12_div3
+ - const: apll12_div9
+ - const: a1sys_hp_sel
+ - const: aud_intbus_sel
+ - const: audio_h_sel
+ - const: audio_local_bus_sel
+ - const: dptx_m_sel
+ - const: i2so1_m_sel
+ - const: i2so2_m_sel
+ - const: i2si1_m_sel
+ - const: i2si2_m_sel
+ - const: infra_ao_audio_26m_b
+ - const: scp_adsp_audiodsp
+
+ mediatek,etdm-in1-chn-disabled:
+ $ref: /schemas/types.yaml#/definitions/uint8-array
+ maxItems: 24
+ description: Specify which input channel should be disabled.
+
+ mediatek,etdm-in2-chn-disabled:
+ $ref: /schemas/types.yaml#/definitions/uint8-array
+ maxItems: 16
+ description: Specify which input channel should be disabled.
+
+patternProperties:
+ "^mediatek,etdm-in[1-2]-mclk-always-on-rate-hz$":
+ description: Specify etdm in mclk output rate for always on case.
+
+ "^mediatek,etdm-out[1-3]-mclk-always-on-rate-hz$":
+ description: Specify etdm out mclk output rate for always on case.
+
+ "^mediatek,etdm-in[1-2]-multi-pin-mode$":
+ type: boolean
+ description: if present, the etdm data mode is I2S.
+
+ "^mediatek,etdm-out[1-3]-multi-pin-mode$":
+ type: boolean
+ description: if present, the etdm data mode is I2S.
+
+ "^mediatek,etdm-in[1-2]-cowork-source$":
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ etdm modules can share the same external clock pin. Specify
+ which etdm clock source is required by this etdm in moudule.
+ enum:
+ - 0 # etdm1_in
+ - 1 # etdm2_in
+ - 2 # etdm1_out
+ - 3 # etdm2_out
+
+ "^mediatek,etdm-out[1-2]-cowork-source$":
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ etdm modules can share the same external clock pin. Specify
+ which etdm clock source is required by this etdm out moudule.
+ enum:
+ - 0 # etdm1_in
+ - 1 # etdm2_in
+ - 2 # etdm1_out
+ - 3 # etdm2_out
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - mediatek,topckgen
+ - power-domains
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ afe: mt8195-afe-pcm@10890000 {
+ compatible = "mediatek,mt8195-audio";
+ reg = <0x10890000 0x10000>;
+ interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
+ mediatek,topckgen = <&topckgen>;
+ power-domains = <&spm 7>; //MT8195_POWER_DOMAIN_AUDIO
+ clocks = <&clk26m>,
+ <&topckgen 163>, //CLK_TOP_APLL1
+ <&topckgen 166>, //CLK_TOP_APLL2
+ <&topckgen 233>, //CLK_TOP_APLL12_DIV0
+ <&topckgen 234>, //CLK_TOP_APLL12_DIV1
+ <&topckgen 235>, //CLK_TOP_APLL12_DIV2
+ <&topckgen 236>, //CLK_TOP_APLL12_DIV3
+ <&topckgen 238>, //CLK_TOP_APLL12_DIV9
+ <&topckgen 100>, //CLK_TOP_A1SYS_HP_SEL
+ <&topckgen 33>, //CLK_TOP_AUD_INTBUS_SEL
+ <&topckgen 34>, //CLK_TOP_AUDIO_H_SEL
+ <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS_SEL
+ <&topckgen 98>, //CLK_TOP_DPTX_M_SEL
+ <&topckgen 94>, //CLK_TOP_I2SO1_M_SEL
+ <&topckgen 95>, //CLK_TOP_I2SO2_M_SEL
+ <&topckgen 96>, //CLK_TOP_I2SI1_M_SEL
+ <&topckgen 97>, //CLK_TOP_I2SI2_M_SEL
+ <&infracfg_ao 50>, //CLK_INFRA_AO_AUDIO_26M_B
+ <&scp_adsp 0>; //CLK_SCP_ADSP_AUDIODSP
+ clock-names = "clk26m",
+ "apll1_ck",
+ "apll2_ck",
+ "apll12_div0",
+ "apll12_div1",
+ "apll12_div2",
+ "apll12_div3",
+ "apll12_div9",
+ "a1sys_hp_sel",
+ "aud_intbus_sel",
+ "audio_h_sel",
+ "audio_local_bus_sel",
+ "dptx_m_sel",
+ "i2so1_m_sel",
+ "i2so2_m_sel",
+ "i2si1_m_sel",
+ "i2si2_m_sel",
+ "infra_ao_audio_26m_b",
+ "scp_adsp_audiodsp";
+ };
+
+...
diff --git a/dts/Bindings/sound/mt8195-mt6359-rt1019-rt5682.yaml b/dts/Bindings/sound/mt8195-mt6359-rt1019-rt5682.yaml
new file mode 100644
index 0000000000..20bc0ffd0e
--- /dev/null
+++ b/dts/Bindings/sound/mt8195-mt6359-rt1019-rt5682.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/mt8195-mt6359-rt1019-rt5682.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek MT8195 with MT6359, RT1019 and RT5682 ASoC sound card driver
+
+maintainers:
+ - Trevor Wu <trevor.wu@mediatek.com>
+
+description:
+ This binding describes the MT8195 sound card.
+
+properties:
+ compatible:
+ const: mediatek,mt8195_mt6359_rt1019_rt5682
+
+ mediatek,platform:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 ASoC platform.
+
+ mediatek,dptx-codec:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 Display Port Tx codec node.
+
+ mediatek,hdmi-codec:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 HDMI codec node.
+
+additionalProperties: false
+
+required:
+ - compatible
+ - mediatek,platform
+
+examples:
+ - |
+
+ sound: mt8195-sound {
+ compatible = "mediatek,mt8195_mt6359_rt1019_rt5682";
+ mediatek,platform = <&afe>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&aud_pins_default>;
+ };
+
+...
diff --git a/dts/Bindings/sound/qcom,sm8250.yaml b/dts/Bindings/sound/qcom,sm8250.yaml
index 72ad9ab918..7d57eb9165 100644
--- a/dts/Bindings/sound/qcom,sm8250.yaml
+++ b/dts/Bindings/sound/qcom,sm8250.yaml
@@ -15,9 +15,9 @@ description:
properties:
compatible:
- oneOf:
- - const: qcom,sm8250-sndcard
- - const: qcom,qrb5165-rb5-sndcard
+ enum:
+ - qcom,sm8250-sndcard
+ - qcom,qrb5165-rb5-sndcard
audio-routing:
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
diff --git a/dts/Bindings/sound/realtek,rt1015p.yaml b/dts/Bindings/sound/realtek,rt1015p.yaml
index 644b68edf3..fdb7f295ef 100644
--- a/dts/Bindings/sound/realtek,rt1015p.yaml
+++ b/dts/Bindings/sound/realtek,rt1015p.yaml
@@ -15,7 +15,9 @@ description: |
properties:
compatible:
- const: realtek,rt1015p
+ enum:
+ - realtek,rt1015p
+ - realtek,rt1019p
sdb-gpios:
description:
diff --git a/dts/Bindings/sound/renesas,rz-ssi.yaml b/dts/Bindings/sound/renesas,rz-ssi.yaml
new file mode 100644
index 0000000000..414ff8035a
--- /dev/null
+++ b/dts/Bindings/sound/renesas,rz-ssi.yaml
@@ -0,0 +1,118 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/renesas,rz-ssi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas RZ/G2L ASoC Sound Serial Interface (SSIF-2)
+
+maintainers:
+ - Biju Das <biju.das.jz@bp.renesas.com>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - renesas,r9a07g044-ssi # RZ/G2{L,LC}
+ - const: renesas,rz-ssi
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 4
+
+ interrupt-names:
+ items:
+ - const: int_req
+ - const: dma_rx
+ - const: dma_tx
+ - const: dma_rt
+
+ clocks:
+ maxItems: 4
+
+ clock-names:
+ items:
+ - const: ssi
+ - const: ssi_sfr
+ - const: audio_clk1
+ - const: audio_clk2
+
+ power-domains:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ dmas:
+ minItems: 1
+ maxItems: 2
+ description:
+ The first cell represents a phandle to dmac
+ The second cell specifies the encoded MID/RID values of the SSI port
+ connected to the DMA client and the slave channel configuration
+ parameters.
+ bits[0:9] - Specifies MID/RID value of a SSI channel as below
+ MID/RID value of SSI rx0 = 0x256
+ MID/RID value of SSI tx0 = 0x255
+ MID/RID value of SSI rx1 = 0x25a
+ MID/RID value of SSI tx1 = 0x259
+ MID/RID value of SSI rt2 = 0x25f
+ MID/RID value of SSI rx3 = 0x262
+ MID/RID value of SSI tx3 = 0x261
+ bit[10] - HIEN = 1, Detects a request in response to the rising edge
+ of the signal
+ bit[11] - LVL = 0, Detects based on the edge
+ bits[12:14] - AM = 2, Bus cycle mode
+ bit[15] - TM = 0, Single transfer mode
+
+ dma-names:
+ oneOf:
+ - items:
+ - const: tx
+ - const: rx
+ - items:
+ - const: rt
+
+ '#sound-dai-cells':
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - resets
+ - '#sound-dai-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/r9a07g044-cpg.h>
+
+ ssi0: ssi@10049c00 {
+ compatible = "renesas,r9a07g044-ssi",
+ "renesas,rz-ssi";
+ reg = <0x10049c00 0x400>;
+ interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 327 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 329 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ clocks = <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>,
+ <&cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR>,
+ <&audio_clk1>,
+ <&audio_clk2>;
+ clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A07G044_SSI0_RST_M2_REG>;
+ dmas = <&dmac 0x2655>,
+ <&dmac 0x2656>;
+ dma-names = "tx", "rx";
+ #sound-dai-cells = <0>;
+ };
diff --git a/dts/Bindings/sound/rockchip-i2s.yaml b/dts/Bindings/sound/rockchip-i2s.yaml
index 245895b58a..5ea16b8ef9 100644
--- a/dts/Bindings/sound/rockchip-i2s.yaml
+++ b/dts/Bindings/sound/rockchip-i2s.yaml
@@ -20,7 +20,9 @@ properties:
- items:
- enum:
- rockchip,px30-i2s
+ - rockchip,rk1808-i2s
- rockchip,rk3036-i2s
+ - rockchip,rk3128-i2s
- rockchip,rk3188-i2s
- rockchip,rk3228-i2s
- rockchip,rk3288-i2s
@@ -29,6 +31,7 @@ properties:
- rockchip,rk3366-i2s
- rockchip,rk3368-i2s
- rockchip,rk3399-i2s
+ - rockchip,rv1126-i2s
- const: rockchip,rk3066-i2s
reg:
@@ -61,6 +64,14 @@ properties:
power-domains:
maxItems: 1
+ reset-names:
+ items:
+ - const: reset-m
+ - const: reset-h
+
+ resets:
+ maxItems: 2
+
rockchip,capture-channels:
$ref: /schemas/types.yaml#/definitions/uint32
default: 2
diff --git a/dts/Bindings/sound/rockchip-spdif.yaml b/dts/Bindings/sound/rockchip-spdif.yaml
index 62a61b68df..d0a24bf928 100644
--- a/dts/Bindings/sound/rockchip-spdif.yaml
+++ b/dts/Bindings/sound/rockchip-spdif.yaml
@@ -23,6 +23,7 @@ properties:
- const: rockchip,rk3366-spdif
- const: rockchip,rk3368-spdif
- const: rockchip,rk3399-spdif
+ - const: rockchip,rk3568-spdif
- items:
- enum:
- rockchip,rk3188-spdif
diff --git a/dts/Bindings/sound/st,stm32-sai.yaml b/dts/Bindings/sound/st,stm32-sai.yaml
index 06e8346170..f97132400b 100644
--- a/dts/Bindings/sound/st,stm32-sai.yaml
+++ b/dts/Bindings/sound/st,stm32-sai.yaml
@@ -180,7 +180,6 @@ examples:
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
- status = "okay";
sai2a: audio-controller@4400b004 {
#sound-dai-cells = <0>;
@@ -190,7 +189,6 @@ examples:
dma-names = "tx";
clocks = <&rcc SAI2_K>;
clock-names = "sai_ck";
- status = "okay";
};
};
diff --git a/dts/Bindings/sound/ti,j721e-cpb-audio.yaml b/dts/Bindings/sound/ti,j721e-cpb-audio.yaml
index ec06789b21..6806f53a4a 100644
--- a/dts/Bindings/sound/ti,j721e-cpb-audio.yaml
+++ b/dts/Bindings/sound/ti,j721e-cpb-audio.yaml
@@ -127,8 +127,6 @@ examples:
compatible = "ti,j721e-cpb-audio";
model = "j721e-cpb";
- status = "okay";
-
ti,cpb-mcasp = <&mcasp10>;
ti,cpb-codec = <&pcm3168a_1>;
diff --git a/dts/Bindings/sound/ti,j721e-cpb-ivi-audio.yaml b/dts/Bindings/sound/ti,j721e-cpb-ivi-audio.yaml
index ee9f960de3..859d369c71 100644
--- a/dts/Bindings/sound/ti,j721e-cpb-ivi-audio.yaml
+++ b/dts/Bindings/sound/ti,j721e-cpb-ivi-audio.yaml
@@ -119,8 +119,6 @@ examples:
compatible = "ti,j721e-cpb-ivi-audio";
model = "j721e-cpb-ivi";
- status = "okay";
-
ti,cpb-mcasp = <&mcasp10>;
ti,cpb-codec = <&pcm3168a_1>;
diff --git a/dts/Bindings/sound/tlv320adcx140.yaml b/dts/Bindings/sound/tlv320adcx140.yaml
index 54d64785aa..d77c828352 100644
--- a/dts/Bindings/sound/tlv320adcx140.yaml
+++ b/dts/Bindings/sound/tlv320adcx140.yaml
@@ -24,10 +24,10 @@ description: |
properties:
compatible:
- oneOf:
- - const: ti,tlv320adc3140
- - const: ti,tlv320adc5140
- - const: ti,tlv320adc6140
+ enum:
+ - ti,tlv320adc3140
+ - ti,tlv320adc5140
+ - ti,tlv320adc6140
reg:
maxItems: 1
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-19 08:17:17 +0000