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Diffstat (limited to 'dts/Bindings/spi/spi-bus.txt')
| -rw-r--r-- | dts/Bindings/spi/spi-bus.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/dts/Bindings/spi/spi-bus.txt b/dts/Bindings/spi/spi-bus.txt index bbaa857dd6..42d595425d 100644 --- a/dts/Bindings/spi/spi-bus.txt +++ b/dts/Bindings/spi/spi-bus.txt @@ -61,6 +61,8 @@ contain the following properties. used for MOSI. Defaults to 1 if not present. - spi-rx-bus-width - (optional) The bus width(number of data wires) that used for MISO. Defaults to 1 if not present. +- spi-rx-delay-us - (optional) Microsecond delay after a read transfer. +- spi-tx-delay-us - (optional) Microsecond delay after a write transfer. Some SPI controllers and devices support Dual and Quad SPI transfer mode. It allows data in the SPI system to be transferred in 2 wires(DUAL) or 4 wires(QUAD). |