diff options
Diffstat (limited to 'dts/Bindings/timer')
| -rw-r--r-- | dts/Bindings/timer/cadence,ttc-timer.txt | 4 | ||||
| -rw-r--r-- | dts/Bindings/timer/nxp,lpc3220-timer.txt | 26 | ||||
| -rw-r--r-- | dts/Bindings/timer/renesas,16bit-timer.txt | 25 | ||||
| -rw-r--r-- | dts/Bindings/timer/renesas,8bit-timer.txt | 25 | ||||
| -rw-r--r-- | dts/Bindings/timer/renesas,tpu.txt | 21 | ||||
| -rw-r--r-- | dts/Bindings/timer/st,stm32-timer.txt | 22 |
6 files changed, 123 insertions, 0 deletions
diff --git a/dts/Bindings/timer/cadence,ttc-timer.txt b/dts/Bindings/timer/cadence,ttc-timer.txt index 993695c659..eeee6cd51e 100644 --- a/dts/Bindings/timer/cadence,ttc-timer.txt +++ b/dts/Bindings/timer/cadence,ttc-timer.txt @@ -6,6 +6,9 @@ Required properties: - interrupts : A list of 3 interrupts; one per timer channel. - clocks: phandle to the source clock +Optional properties: +- timer-width: Bit width of the timer, necessary if not 16. + Example: ttc0: ttc0@f8001000 { @@ -14,4 +17,5 @@ ttc0: ttc0@f8001000 { compatible = "cdns,ttc"; reg = <0xF8001000 0x1000>; clocks = <&cpu_clk 3>; + timer-width = <32>; }; diff --git a/dts/Bindings/timer/nxp,lpc3220-timer.txt b/dts/Bindings/timer/nxp,lpc3220-timer.txt new file mode 100644 index 0000000000..51b05a0e70 --- /dev/null +++ b/dts/Bindings/timer/nxp,lpc3220-timer.txt @@ -0,0 +1,26 @@ +* NXP LPC3220 timer + +The NXP LPC3220 timer is used on a wide range of NXP SoCs. This +includes LPC32xx, LPC178x, LPC18xx and LPC43xx parts. + +Required properties: +- compatible: + Should be "nxp,lpc3220-timer". +- reg: + Address and length of the register set. +- interrupts: + Reference to the timer interrupt +- clocks: + Should contain a reference to timer clock. +- clock-names: + Should contain "timerclk". + +Example: + +timer1: timer@40085000 { + compatible = "nxp,lpc3220-timer"; + reg = <0x40085000 0x1000>; + interrupts = <13>; + clocks = <&ccu1 CLK_CPU_TIMER1>; + clock-names = "timerclk"; +}; diff --git a/dts/Bindings/timer/renesas,16bit-timer.txt b/dts/Bindings/timer/renesas,16bit-timer.txt new file mode 100644 index 0000000000..e8792447a1 --- /dev/null +++ b/dts/Bindings/timer/renesas,16bit-timer.txt @@ -0,0 +1,25 @@ +* Renesas H8/300 16bit timer + +The 16bit timer is a 16bit timer/counter with configurable clock inputs and +programmable compare match. + +Required Properties: + + - compatible: must contain "renesas,16bit-timer" + - reg: base address and length of the registers block for the timer module. + - interrupts: interrupt-specifier for the timer, IMIA + - clocks: a list of phandle, one for each entry in clock-names. + - clock-names: must contain "peripheral_clk" for the functional clock. + - renesas,channel: timer channel number. + +Example: + + timer16: timer@ffff68 { + compatible = "reneas,16bit-timer"; + reg = <0xffff68 8>, <0xffff60 8>; + interrupts = <24>; + renesas,channel = <0>; + clocks = <&pclk>; + clock-names = "peripheral_clk"; + }; + diff --git a/dts/Bindings/timer/renesas,8bit-timer.txt b/dts/Bindings/timer/renesas,8bit-timer.txt new file mode 100644 index 0000000000..9dca3759a0 --- /dev/null +++ b/dts/Bindings/timer/renesas,8bit-timer.txt @@ -0,0 +1,25 @@ +* Renesas H8/300 8bit timer + +The 8bit timer is a 8bit timer/counter with configurable clock inputs and +programmable compare match. + +This implement only supported cascade mode. + +Required Properties: + + - compatible: must contain "renesas,8bit-timer" + - reg: base address and length of the registers block for the timer module. + - interrupts: interrupt-specifier for the timer, CMIA and TOVI + - clocks: a list of phandle, one for each entry in clock-names. + - clock-names: must contain "fck" for the functional clock. + +Example: + + timer8_0: timer@ffff80 { + compatible = "renesas,8bit-timer"; + reg = <0xffff80 10>; + interrupts = <36>; + clocks = <&fclk>; + clock-names = "fck"; + }; + diff --git a/dts/Bindings/timer/renesas,tpu.txt b/dts/Bindings/timer/renesas,tpu.txt new file mode 100644 index 0000000000..f8b25897fb --- /dev/null +++ b/dts/Bindings/timer/renesas,tpu.txt @@ -0,0 +1,21 @@ +* Renesas H8/300 Timer Pluse Unit + +The TPU is a 16bit timer/counter with configurable clock inputs and +programmable compare match. +This implementation support only cascade mode. + +Required Properties: + + - compatible: must contain "renesas,tpu" + - reg: base address and length of the registers block in 2 channel. + - clocks: a list of phandle, one for each entry in clock-names. + - clock-names: must contain "peripheral_clk" for the functional clock. + + +Example: + tpu: tpu@ffffe0 { + compatible = "renesas,tpu"; + reg = <0xffffe0 16>, <0xfffff0 12>; + clocks = <&pclk>; + clock-names = "peripheral_clk"; + }; diff --git a/dts/Bindings/timer/st,stm32-timer.txt b/dts/Bindings/timer/st,stm32-timer.txt new file mode 100644 index 0000000000..8ef28e70d6 --- /dev/null +++ b/dts/Bindings/timer/st,stm32-timer.txt @@ -0,0 +1,22 @@ +. STMicroelectronics STM32 timer + +The STM32 MCUs family has several general-purpose 16 and 32 bits timers. + +Required properties: +- compatible : Should be "st,stm32-timer" +- reg : Address and length of the register set +- clocks : Reference on the timer input clock +- interrupts : Reference to the timer interrupt + +Optional properties: +- resets: Reference to a reset controller asserting the timer + +Example: + +timer5: timer@40000c00 { + compatible = "st,stm32-timer"; + reg = <0x40000c00 0x400>; + interrupts = <50>; + resets = <&rrc 259>; + clocks = <&clk_pmtr1>; +}; |