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-rw-r--r--dts/Bindings/ufs/ufs-hisi.txt5
-rw-r--r--dts/Bindings/ufs/ufshcd-pltfrm.txt13
2 files changed, 11 insertions, 7 deletions
diff --git a/dts/Bindings/ufs/ufs-hisi.txt b/dts/Bindings/ufs/ufs-hisi.txt
index a48c448..0b83df1 100644
--- a/dts/Bindings/ufs/ufs-hisi.txt
+++ b/dts/Bindings/ufs/ufs-hisi.txt
@@ -6,9 +6,10 @@ Each UFS Host Controller should have its own node.
Required properties:
- compatible : compatible list, contains one of the following -
"hisilicon,hi3660-ufs", "jedec,ufs-1.1" for hisi ufs
- host controller present on Hi36xx chipset.
+ host controller present on Hi3660 chipset.
+ "hisilicon,hi3670-ufs", "jedec,ufs-2.1" for hisi ufs
+ host controller present on Hi3670 chipset.
- reg : should contain UFS register address space & UFS SYS CTRL register address,
-- interrupt-parent : interrupt device
- interrupts : interrupt number
- clocks : List of phandle and clock specifier pairs
- clock-names : List of clock input name strings sorted in the same
diff --git a/dts/Bindings/ufs/ufshcd-pltfrm.txt b/dts/Bindings/ufs/ufshcd-pltfrm.txt
index 8cf5945..5111e91 100644
--- a/dts/Bindings/ufs/ufshcd-pltfrm.txt
+++ b/dts/Bindings/ufs/ufshcd-pltfrm.txt
@@ -4,11 +4,14 @@ UFSHC nodes are defined to describe on-chip UFS host controllers.
Each UFS controller instance should have its own node.
Required properties:
-- compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0", may
- also list one or more of the following:
- "qcom,msm8994-ufshc"
- "qcom,msm8996-ufshc"
- "qcom,ufshc"
+- compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0"
+
+ For Qualcomm SoCs must contain, as below, an
+ SoC-specific compatible along with "qcom,ufshc" and
+ the appropriate jedec string:
+ "qcom,msm8994-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
+ "qcom,msm8996-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
+ "qcom,sdm845-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- interrupts : <interrupt mapping for UFS host controller IRQ>
- reg : <registers mapping>