diff options
Diffstat (limited to 'dts/src/arc/axs10x_mb.dtsi')
| -rw-r--r-- | dts/src/arc/axs10x_mb.dtsi | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/dts/src/arc/axs10x_mb.dtsi b/dts/src/arc/axs10x_mb.dtsi index 0ff7e07edc..e114000a84 100644 --- a/dts/src/arc/axs10x_mb.dtsi +++ b/dts/src/arc/axs10x_mb.dtsi @@ -44,7 +44,14 @@ mmcclk: mmcclk { compatible = "fixed-clock"; - clock-frequency = <50000000>; + /* + * DW sdio controller has external ciu clock divider + * controlled via register in SDIO IP. It divides + * sdio_ref_clk (which comes from CGU) by 16 for + * default. So default mmcclk clock (which comes + * to sdk_in) is 25000000 Hz. + */ + clock-frequency = <25000000>; #clock-cells = <0>; }; @@ -101,7 +108,6 @@ mmc@0x15000 { compatible = "altr,socfpga-dw-mshc"; reg = < 0x15000 0x400 >; - num-slots = < 1 >; fifo-depth = < 16 >; card-detect-delay = < 200 >; clocks = <&apbclk>, <&mmcclk>; |