summaryrefslogtreecommitdiffstats
path: root/dts/src/arm/armada-385-db-88f6820-amc.dts
diff options
context:
space:
mode:
Diffstat (limited to 'dts/src/arm/armada-385-db-88f6820-amc.dts')
-rw-r--r--dts/src/arm/armada-385-db-88f6820-amc.dts155
1 files changed, 0 insertions, 155 deletions
diff --git a/dts/src/arm/armada-385-db-88f6820-amc.dts b/dts/src/arm/armada-385-db-88f6820-amc.dts
deleted file mode 100644
index 7881df3b28..0000000000
--- a/dts/src/arm/armada-385-db-88f6820-amc.dts
+++ /dev/null
@@ -1,155 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Device Tree file for Marvell Armada 385 AMC board
- * (DB-88F6820-AMC)
- *
- * Copyright (C) 2017 Allied Telesis Labs
- */
-
-/dts-v1/;
-#include "armada-385.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
- model = "Marvell Armada 385 AMC";
- compatible = "marvell,a385-db-amc", "marvell,armada385", "marvell,armada380";
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- aliases {
- ethernet0 = &eth0;
- ethernet1 = &eth1;
- spi1 = &spi1;
- };
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x80000000>; /* 2GB */
- };
-
- soc {
- ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
- MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
- };
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins>;
- status = "okay";
-};
-
-&uart0 {
- /*
- * Exported on the micro USB connector CON3
- * through an FTDI
- */
-
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins>;
- status = "okay";
-};
-
-
-&eth0 {
- pinctrl-names = "default";
- /*
- * The Reference Clock 0 is used to provide a
- * clock to the PHY
- */
- pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
- status = "okay";
- phy = <&phy0>;
- phy-mode = "rgmii-id";
-};
-
-&eth2 {
- status = "okay";
- phy = <&phy1>;
- phy-mode = "sgmii";
-};
-
-&usb0 {
- status = "okay";
-};
-
-
-
-&mdio {
- pinctrl-names = "default";
- pinctrl-0 = <&mdio_pins>;
-
- phy0: ethernet-phy@1 {
- reg = <1>;
- };
-
- phy1: ethernet-phy@0 {
- reg = <0>;
- };
-};
-
-&nand_controller {
- status = "okay";
-
- nand@0 {
- reg = <0>;
- label = "pxa3xx_nand-0";
- nand-rb = <0>;
- nand-on-flash-bbt;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
- partition@0 {
- reg = <0x00000000 0x40000000>;
- label = "user";
- };
- };
- };
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie1 {
- /* Port 0, Lane 0 */
- status = "okay";
-};
-
-&spi1 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi1_pins>;
- status = "okay";
-
- spi-flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- reg = <0>; /* Chip select 0 */
- spi-max-frequency = <50000000>;
- m25p,fast-read;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
- partition@0 {
- reg = <0x00000000 0x00100000>;
- label = "u-boot";
- };
- partition@100000 {
- reg = <0x00100000 0x00040000>;
- label = "u-boot-env";
- };
- };
- };
-};
-
-&refclk {
- clock-frequency = <20000000>;
-};