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Diffstat (limited to 'dts/src/arm/aspeed-bmc-facebook-tiogapass.dts')
-rw-r--r--dts/src/arm/aspeed-bmc-facebook-tiogapass.dts55
1 files changed, 53 insertions, 2 deletions
diff --git a/dts/src/arm/aspeed-bmc-facebook-tiogapass.dts b/dts/src/arm/aspeed-bmc-facebook-tiogapass.dts
index f8e7b71..4c2dcac 100644
--- a/dts/src/arm/aspeed-bmc-facebook-tiogapass.dts
+++ b/dts/src/arm/aspeed-bmc-facebook-tiogapass.dts
@@ -21,6 +21,17 @@
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
+
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
+ <&adc 4>, <&adc 5>, <&adc 6>;
+ };
+
+ iio-hwmon-battery {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 7>;
+ };
};
&fmc {
@@ -43,6 +54,16 @@
};
};
+&lpc_snoop {
+ status = "okay";
+ snoop-ports = <0x80>;
+};
+
+&lpc_ctrl {
+ // Enable lpc clock
+ status = "okay";
+};
+
&uart1 {
// Host Console
status = "okay";
@@ -51,11 +72,33 @@
&pinctrl_rxd1_default>;
};
+&uart2 {
+ // SoL Host Console
+ status = "okay";
+};
+
+&uart3 {
+ // SoL BMC Console
+ status = "okay";
+};
+
&uart5 {
// BMC Console
status = "okay";
};
+&kcs2 {
+ // BMC KCS channel 2
+ status = "okay";
+ kcs_addr = <0xca8>;
+};
+
+&kcs3 {
+ // BMC KCS channel 3
+ status = "okay";
+ kcs_addr = <0xca2>;
+};
+
&mac0 {
status = "okay";
@@ -64,6 +107,10 @@
use-ncsi;
};
+&adc {
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
//Airmax Conn B, CPU0 PIROM, CPU1 PIROM
@@ -122,6 +169,10 @@
&i2c8 {
status = "okay";
+ tmp421@1f {
+ compatible = "ti,tmp421";
+ reg = <0x1f>;
+ };
//Mezz Sensor SMBus
};
@@ -140,7 +191,7 @@
};
fan@1 {
- reg = <0x00>;
- aspeed,fan-tach-ch = /bits/ 8 <0x01>;
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
};