diff options
Diffstat (limited to 'dts/src/arm/at91sam9n12.dtsi')
| -rw-r--r-- | dts/src/arm/at91sam9n12.dtsi | 83 |
1 files changed, 79 insertions, 4 deletions
diff --git a/dts/src/arm/at91sam9n12.dtsi b/dts/src/arm/at91sam9n12.dtsi index 5c2a8c8c8b..32bc9a189d 100644 --- a/dts/src/arm/at91sam9n12.dtsi +++ b/dts/src/arm/at91sam9n12.dtsi @@ -376,6 +376,7 @@ rstc@fffffe00 { compatible = "atmel,at91sam9g45-rstc"; reg = <0xfffffe00 0x10>; + clocks = <&clk32k>; }; pit: timer@fffffe30 { @@ -388,6 +389,7 @@ shdwc@fffffe10 { compatible = "atmel,at91sam9x5-shdwc"; reg = <0xfffffe10 0x10>; + clocks = <&clk32k>; }; sckc@fffffe50 { @@ -431,16 +433,44 @@ compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tcb_clk>; - clock-names = "t0_clk"; + clocks = <&tcb_clk>, <&clk32k>; + clock-names = "t0_clk", "slow_clk"; }; tcb1: timer@f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tcb_clk>; - clock-names = "t0_clk"; + clocks = <&tcb_clk>, <&clk32k>; + clock-names = "t0_clk", "slow_clk"; + }; + + hlcdc: hlcdc@f8038000 { + compatible = "atmel,at91sam9n12-hlcdc"; + reg = <0xf8038000 0x2000>; + interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; + clock-names = "periph_clk", "sys_clk", "slow_clk"; + status = "disabled"; + + hlcdc-display-controller { + compatible = "atmel,hlcdc-display-controller"; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + }; + + hlcdc_pwm: hlcdc-pwm { + compatible = "atmel,hlcdc-pwm"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd_pwm>; + #pwm-cells = <3>; + }; }; dma: dma-controller@ffffec00 { @@ -475,6 +505,49 @@ }; }; + lcd { + pinctrl_lcd_base: lcd-base-0 { + atmel,pins = + <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */ + AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */ + AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDISP */ + AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */ + AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */ + }; + + pinctrl_lcd_pwm: lcd-pwm-0 { + atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */ + }; + + pinctrl_lcd_rgb888: lcd-rgb-3 { + atmel,pins = + <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ + AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ + AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ + AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ + AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ + AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ + AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ + AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ + AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ + AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ + AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ + AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ + AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ + AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ + AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ + AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ + AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */ + AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */ + AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */ + AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */ + AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */ + AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */ + AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */ + AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */ + }; + }; + usart0 { pinctrl_usart0: usart0-0 { atmel,pins = @@ -891,6 +964,7 @@ compatible = "atmel,at91sam9260-wdt"; reg = <0xfffffe40 0x10>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&clk32k>; atmel,watchdog-type = "hardware"; atmel,reset-type = "all"; atmel,dbg-halt; @@ -901,6 +975,7 @@ compatible = "atmel,at91rm9200-rtc"; reg = <0xfffffeb0 0x40>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&clk32k>; status = "disabled"; }; |