diff options
Diffstat (limited to 'dts/src/arm/dra7.dtsi')
| -rw-r--r-- | dts/src/arm/dra7.dtsi | 382 |
1 files changed, 325 insertions, 57 deletions
diff --git a/dts/src/arm/dra7.dtsi b/dts/src/arm/dra7.dtsi index 80127638b3..97f603c448 100644 --- a/dts/src/arm/dra7.dtsi +++ b/dts/src/arm/dra7.dtsi @@ -12,6 +12,9 @@ #include "skeleton.dtsi" +#define MAX_SOURCES 400 +#define DIRECT_IRQ(irq) (MAX_SOURCES + irq) + / { #address-cells = <1>; #size-cells = <1>; @@ -45,6 +48,7 @@ compatible = "arm,cortex-a15-gic"; interrupt-controller; #interrupt-cells = <3>; + arm,routable-irqs = <192>; reg = <0x48211000 0x1000>, <0x48212000 0x1000>, <0x48214000 0x2000>, @@ -79,8 +83,8 @@ ti,hwmods = "l3_main_1", "l3_main_2"; reg = <0x44000000 0x1000000>, <0x45000000 0x1000>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI DIRECT_IRQ(10) IRQ_TYPE_LEVEL_HIGH>; prm: prm@4ae06000 { compatible = "ti,dra7-prm"; @@ -95,6 +99,75 @@ }; }; + axi@0 { + compatible = "simple-bus"; + #size-cells = <1>; + #address-cells = <1>; + ranges = <0x51000000 0x51000000 0x3000 + 0x0 0x20000000 0x10000000>; + pcie@51000000 { + compatible = "ti,dra7-pcie"; + reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>; + reg-names = "rc_dbics", "ti_conf", "config"; + interrupts = <0 232 0x4>, <0 233 0x4>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x81000000 0 0 0x03000 0 0x00010000 + 0x82000000 0 0x20013000 0x13000 0 0xffed000>; + #interrupt-cells = <1>; + num-lanes = <1>; + ti,hwmods = "pcie1"; + phys = <&pcie1_phy>; + phy-names = "pcie-phy0"; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie1_intc 1>, + <0 0 0 2 &pcie1_intc 2>, + <0 0 0 3 &pcie1_intc 3>, + <0 0 0 4 &pcie1_intc 4>; + pcie1_intc: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + }; + + axi@1 { + compatible = "simple-bus"; + #size-cells = <1>; + #address-cells = <1>; + ranges = <0x51800000 0x51800000 0x3000 + 0x0 0x30000000 0x10000000>; + status = "disabled"; + pcie@51000000 { + compatible = "ti,dra7-pcie"; + reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>; + reg-names = "rc_dbics", "ti_conf", "config"; + interrupts = <0 355 0x4>, <0 356 0x4>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x81000000 0 0 0x03000 0 0x00010000 + 0x82000000 0 0x30013000 0x13000 0 0xffed000>; + #interrupt-cells = <1>; + num-lanes = <1>; + ti,hwmods = "pcie2"; + phys = <&pcie2_phy>; + phy-names = "pcie-phy0"; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie2_intc 1>, + <0 0 0 2 &pcie2_intc 2>, + <0 0 0 3 &pcie2_intc 3>, + <0 0 0 4 &pcie2_intc 4>; + pcie2_intc: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + }; + cm_core_aon: cm_core_aon@4a005000 { compatible = "ti,dra7-cm-core-aon"; reg = <0x4a005000 0x2000>; @@ -155,10 +228,10 @@ sdma: dma-controller@4a056000 { compatible = "ti,omap4430-sdma"; reg = <0x4a056000 0x1000>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; #dma-channels = <32>; #dma-requests = <127>; @@ -167,7 +240,7 @@ gpio1: gpio@4ae10000 { compatible = "ti,omap4-gpio"; reg = <0x4ae10000 0x200>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio1"; gpio-controller; #gpio-cells = <2>; @@ -178,7 +251,7 @@ gpio2: gpio@48055000 { compatible = "ti,omap4-gpio"; reg = <0x48055000 0x200>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio2"; gpio-controller; #gpio-cells = <2>; @@ -189,7 +262,7 @@ gpio3: gpio@48057000 { compatible = "ti,omap4-gpio"; reg = <0x48057000 0x200>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio3"; gpio-controller; #gpio-cells = <2>; @@ -200,7 +273,7 @@ gpio4: gpio@48059000 { compatible = "ti,omap4-gpio"; reg = <0x48059000 0x200>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio4"; gpio-controller; #gpio-cells = <2>; @@ -211,7 +284,7 @@ gpio5: gpio@4805b000 { compatible = "ti,omap4-gpio"; reg = <0x4805b000 0x200>; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio5"; gpio-controller; #gpio-cells = <2>; @@ -222,7 +295,7 @@ gpio6: gpio@4805d000 { compatible = "ti,omap4-gpio"; reg = <0x4805d000 0x200>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <2>; @@ -233,7 +306,7 @@ gpio7: gpio@48051000 { compatible = "ti,omap4-gpio"; reg = <0x48051000 0x200>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio7"; gpio-controller; #gpio-cells = <2>; @@ -244,7 +317,7 @@ gpio8: gpio@48053000 { compatible = "ti,omap4-gpio"; reg = <0x48053000 0x200>; - interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio8"; gpio-controller; #gpio-cells = <2>; @@ -255,7 +328,7 @@ uart1: serial@4806a000 { compatible = "ti,omap4-uart"; reg = <0x4806a000 0x100>; - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart1"; clock-frequency = <48000000>; status = "disabled"; @@ -264,7 +337,7 @@ uart2: serial@4806c000 { compatible = "ti,omap4-uart"; reg = <0x4806c000 0x100>; - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart2"; clock-frequency = <48000000>; status = "disabled"; @@ -273,7 +346,7 @@ uart3: serial@48020000 { compatible = "ti,omap4-uart"; reg = <0x48020000 0x100>; - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart3"; clock-frequency = <48000000>; status = "disabled"; @@ -282,7 +355,7 @@ uart4: serial@4806e000 { compatible = "ti,omap4-uart"; reg = <0x4806e000 0x100>; - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart4"; clock-frequency = <48000000>; status = "disabled"; @@ -291,7 +364,7 @@ uart5: serial@48066000 { compatible = "ti,omap4-uart"; reg = <0x48066000 0x100>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart5"; clock-frequency = <48000000>; status = "disabled"; @@ -300,7 +373,7 @@ uart6: serial@48068000 { compatible = "ti,omap4-uart"; reg = <0x48068000 0x100>; - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart6"; clock-frequency = <48000000>; status = "disabled"; @@ -309,6 +382,7 @@ uart7: serial@48420000 { compatible = "ti,omap4-uart"; reg = <0x48420000 0x100>; + interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart7"; clock-frequency = <48000000>; status = "disabled"; @@ -317,6 +391,7 @@ uart8: serial@48422000 { compatible = "ti,omap4-uart"; reg = <0x48422000 0x100>; + interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart8"; clock-frequency = <48000000>; status = "disabled"; @@ -325,6 +400,7 @@ uart9: serial@48424000 { compatible = "ti,omap4-uart"; reg = <0x48424000 0x100>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart9"; clock-frequency = <48000000>; status = "disabled"; @@ -333,15 +409,133 @@ uart10: serial@4ae2b000 { compatible = "ti,omap4-uart"; reg = <0x4ae2b000 0x100>; + interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart10"; clock-frequency = <48000000>; status = "disabled"; }; + mailbox1: mailbox@4a0f4000 { + compatible = "ti,omap4-mailbox"; + reg = <0x4a0f4000 0x200>; + ti,hwmods = "mailbox1"; + ti,mbox-num-users = <3>; + ti,mbox-num-fifos = <8>; + status = "disabled"; + }; + + mailbox2: mailbox@4883a000 { + compatible = "ti,omap4-mailbox"; + reg = <0x4883a000 0x200>; + ti,hwmods = "mailbox2"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox3: mailbox@4883c000 { + compatible = "ti,omap4-mailbox"; + reg = <0x4883c000 0x200>; + ti,hwmods = "mailbox3"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox4: mailbox@4883e000 { + compatible = "ti,omap4-mailbox"; + reg = <0x4883e000 0x200>; + ti,hwmods = "mailbox4"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox5: mailbox@48840000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48840000 0x200>; + ti,hwmods = "mailbox5"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox6: mailbox@48842000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48842000 0x200>; + ti,hwmods = "mailbox6"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox7: mailbox@48844000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48844000 0x200>; + ti,hwmods = "mailbox7"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox8: mailbox@48846000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48846000 0x200>; + ti,hwmods = "mailbox8"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox9: mailbox@4885e000 { + compatible = "ti,omap4-mailbox"; + reg = <0x4885e000 0x200>; + ti,hwmods = "mailbox9"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox10: mailbox@48860000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48860000 0x200>; + ti,hwmods = "mailbox10"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox11: mailbox@48862000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48862000 0x200>; + ti,hwmods = "mailbox11"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox12: mailbox@48864000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48864000 0x200>; + ti,hwmods = "mailbox12"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox13: mailbox@48802000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48802000 0x200>; + ti,hwmods = "mailbox13"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + timer1: timer@4ae18000 { compatible = "ti,omap5430-timer"; reg = <0x4ae18000 0x80>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer1"; ti,timer-alwon; }; @@ -349,28 +543,28 @@ timer2: timer@48032000 { compatible = "ti,omap5430-timer"; reg = <0x48032000 0x80>; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer2"; }; timer3: timer@48034000 { compatible = "ti,omap5430-timer"; reg = <0x48034000 0x80>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer3"; }; timer4: timer@48036000 { compatible = "ti,omap5430-timer"; reg = <0x48036000 0x80>; - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer4"; }; timer5: timer@48820000 { compatible = "ti,omap5430-timer"; reg = <0x48820000 0x80>; - interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer5"; ti,timer-dsp; }; @@ -378,7 +572,7 @@ timer6: timer@48822000 { compatible = "ti,omap5430-timer"; reg = <0x48822000 0x80>; - interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer6"; ti,timer-dsp; ti,timer-pwm; @@ -387,7 +581,7 @@ timer7: timer@48824000 { compatible = "ti,omap5430-timer"; reg = <0x48824000 0x80>; - interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer7"; ti,timer-dsp; }; @@ -395,7 +589,7 @@ timer8: timer@48826000 { compatible = "ti,omap5430-timer"; reg = <0x48826000 0x80>; - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer8"; ti,timer-dsp; ti,timer-pwm; @@ -404,21 +598,21 @@ timer9: timer@4803e000 { compatible = "ti,omap5430-timer"; reg = <0x4803e000 0x80>; - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer9"; }; timer10: timer@48086000 { compatible = "ti,omap5430-timer"; reg = <0x48086000 0x80>; - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer10"; }; timer11: timer@48088000 { compatible = "ti,omap5430-timer"; reg = <0x48088000 0x80>; - interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer11"; ti,timer-pwm; }; @@ -426,6 +620,7 @@ timer13: timer@48828000 { compatible = "ti,omap5430-timer"; reg = <0x48828000 0x80>; + interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer13"; status = "disabled"; }; @@ -433,6 +628,7 @@ timer14: timer@4882a000 { compatible = "ti,omap5430-timer"; reg = <0x4882a000 0x80>; + interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer14"; status = "disabled"; }; @@ -440,6 +636,7 @@ timer15: timer@4882c000 { compatible = "ti,omap5430-timer"; reg = <0x4882c000 0x80>; + interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer15"; status = "disabled"; }; @@ -447,6 +644,7 @@ timer16: timer@4882e000 { compatible = "ti,omap5430-timer"; reg = <0x4882e000 0x80>; + interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer16"; status = "disabled"; }; @@ -454,7 +652,7 @@ wdt2: wdt@4ae14000 { compatible = "ti,omap4-wdt"; reg = <0x4ae14000 0x80>; - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "wd_timer2"; }; @@ -468,14 +666,14 @@ dmm@4e000000 { compatible = "ti,omap5-dmm"; reg = <0x4e000000 0x800>; - interrupts = <0 113 0x4>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "dmm"; }; i2c1: i2c@48070000 { compatible = "ti,omap4-i2c"; reg = <0x48070000 0x100>; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; @@ -485,7 +683,7 @@ i2c2: i2c@48072000 { compatible = "ti,omap4-i2c"; reg = <0x48072000 0x100>; - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; @@ -495,7 +693,7 @@ i2c3: i2c@48060000 { compatible = "ti,omap4-i2c"; reg = <0x48060000 0x100>; - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; @@ -505,7 +703,7 @@ i2c4: i2c@4807a000 { compatible = "ti,omap4-i2c"; reg = <0x4807a000 0x100>; - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c4"; @@ -515,7 +713,7 @@ i2c5: i2c@4807c000 { compatible = "ti,omap4-i2c"; reg = <0x4807c000 0x100>; - interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c5"; @@ -525,7 +723,7 @@ mmc1: mmc@4809c000 { compatible = "ti,omap4-hsmmc"; reg = <0x4809c000 0x400>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; @@ -538,7 +736,7 @@ mmc2: mmc@480b4000 { compatible = "ti,omap4-hsmmc"; reg = <0x480b4000 0x400>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc2"; ti,needs-special-reset; dmas = <&sdma 47>, <&sdma 48>; @@ -549,7 +747,7 @@ mmc3: mmc@480ad000 { compatible = "ti,omap4-hsmmc"; reg = <0x480ad000 0x400>; - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc3"; ti,needs-special-reset; dmas = <&sdma 77>, <&sdma 78>; @@ -560,7 +758,7 @@ mmc4: mmc@480d1000 { compatible = "ti,omap4-hsmmc"; reg = <0x480d1000 0x400>; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc4"; ti,needs-special-reset; dmas = <&sdma 57>, <&sdma 58>; @@ -703,7 +901,7 @@ mcspi1: spi@48098000 { compatible = "ti,omap4-mcspi"; reg = <0x48098000 0x200>; - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi1"; @@ -724,7 +922,7 @@ mcspi2: spi@4809a000 { compatible = "ti,omap4-mcspi"; reg = <0x4809a000 0x200>; - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi2"; @@ -740,7 +938,7 @@ mcspi3: spi@480b8000 { compatible = "ti,omap4-mcspi"; reg = <0x480b8000 0x200>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi3"; @@ -753,7 +951,7 @@ mcspi4: spi@480ba000 { compatible = "ti,omap4-mcspi"; reg = <0x480ba000 0x200>; - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi4"; @@ -773,6 +971,7 @@ clocks = <&qspi_gfclk_div>; clock-names = "fck"; num-cs = <4>; + interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -803,18 +1002,76 @@ clock-names = "sysclk"; #phy-cells = <0>; }; + + pcie1_phy: pciephy@4a094000 { + compatible = "ti,phy-pipe3-pcie"; + reg = <0x4a094000 0x80>, /* phy_rx */ + <0x4a094400 0x64>; /* phy_tx */ + reg-names = "phy_rx", "phy_tx"; + ctrl-module = <&omap_control_pcie1phy>; + clocks = <&dpll_pcie_ref_ck>, + <&dpll_pcie_ref_m2ldo_ck>, + <&optfclk_pciephy1_32khz>, + <&optfclk_pciephy1_clk>, + <&optfclk_pciephy1_div_clk>, + <&optfclk_pciephy_div>; + clock-names = "dpll_ref", "dpll_ref_m2", + "wkupclk", "refclk", + "div-clk", "phy-div"; + #phy-cells = <0>; + id = <1>; + ti,hwmods = "pcie1-phy"; + }; + + pcie2_phy: pciephy@4a095000 { + compatible = "ti,phy-pipe3-pcie"; + reg = <0x4a095000 0x80>, /* phy_rx */ + <0x4a095400 0x64>; /* phy_tx */ + reg-names = "phy_rx", "phy_tx"; + ctrl-module = <&omap_control_pcie2phy>; + clocks = <&dpll_pcie_ref_ck>, + <&dpll_pcie_ref_m2ldo_ck>, + <&optfclk_pciephy2_32khz>, + <&optfclk_pciephy2_clk>, + <&optfclk_pciephy2_div_clk>, + <&optfclk_pciephy_div>; + clock-names = "dpll_ref", "dpll_ref_m2", + "wkupclk", "refclk", + "div-clk", "phy-div"; + #phy-cells = <0>; + ti,hwmods = "pcie2-phy"; + id = <2>; + status = "disabled"; + }; }; sata: sata@4a141100 { compatible = "snps,dwc-ahci"; reg = <0x4a140000 0x1100>, <0x4a141100 0x7>; - interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; phys = <&sata_phy>; phy-names = "sata-phy"; clocks = <&sata_ref_clk>; ti,hwmods = "sata"; }; + omap_control_pcie1phy: control-phy@0x4a003c40 { + compatible = "ti,control-phy-pcie"; + reg = <0x4a003c40 0x4>, <0x4a003c14 0x4>, <0x4a003c34 0x4>; + reg-names = "power", "control_sma", "pcie_pcs"; + clocks = <&sys_clkin1>; + clock-names = "sysclk"; + }; + + omap_control_pcie2phy: control-pcie@0x4a003c44 { + compatible = "ti,control-phy-pcie"; + reg = <0x4a003c44 0x4>, <0x4a003c14 0x4>, <0x4a003c34 0x4>; + reg-names = "power", "control_sma", "pcie_pcs"; + clocks = <&sys_clkin1>; + clock-names = "sysclk"; + status = "disabled"; + }; + omap_control_usb2phy1: control-phy@4a002300 { compatible = "ti,control-phy-usb2"; reg = <0x4a002300 0x4>; @@ -885,7 +1142,7 @@ compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss1"; reg = <0x48880000 0x10000>; - interrupts = <0 77 4>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <1>; utmi-mode = <2>; @@ -893,7 +1150,7 @@ usb1: usb@48890000 { compatible = "snps,dwc3"; reg = <0x48890000 0x17000>; - interrupts = <0 76 4>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; phys = <&usb2_phy1>, <&usb3_phy1>; phy-names = "usb2-phy", "usb3-phy"; tx-fifo-resize; @@ -906,7 +1163,7 @@ compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss2"; reg = <0x488c0000 0x10000>; - interrupts = <0 92 4>; + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <1>; utmi-mode = <2>; @@ -914,7 +1171,7 @@ usb2: usb@488d0000 { compatible = "snps,dwc3"; reg = <0x488d0000 0x17000>; - interrupts = <0 78 4>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; phys = <&usb2_phy2>; phy-names = "usb2-phy"; tx-fifo-resize; @@ -928,7 +1185,7 @@ compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss3"; reg = <0x48900000 0x10000>; - /* interrupts = <0 TBD 4>; */ + interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <1>; utmi-mode = <2>; @@ -937,7 +1194,7 @@ usb3: usb@48910000 { compatible = "snps,dwc3"; reg = <0x48910000 0x17000>; - /* interrupts = <0 93 4>; */ + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; tx-fifo-resize; maximum-speed = "high-speed"; dr_mode = "otg"; @@ -948,7 +1205,7 @@ compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss4"; reg = <0x48940000 0x10000>; - /* interrupts = <0 TBD 4>; */ + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <1>; utmi-mode = <2>; @@ -957,7 +1214,7 @@ usb4: usb@48950000 { compatible = "snps,dwc3"; reg = <0x48950000 0x17000>; - /* interrupts = <0 TBD 4>; */ + interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; tx-fifo-resize; maximum-speed = "high-speed"; dr_mode = "otg"; @@ -967,7 +1224,7 @@ elm: elm@48078000 { compatible = "ti,am3352-elm"; reg = <0x48078000 0xfc0>; /* device IO registers */ - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "elm"; status = "disabled"; }; @@ -976,7 +1233,7 @@ compatible = "ti,am3352-gpmc"; ti,hwmods = "gpmc"; reg = <0x50000000 0x37c>; /* device IO registers */ - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; gpmc,num-cs = <8>; gpmc,num-waitpins = <2>; #address-cells = <2>; @@ -994,6 +1251,17 @@ clock-names = "fck"; status = "disabled"; }; + + crossbar_mpu: crossbar@4a020000 { + compatible = "ti,irq-crossbar"; + reg = <0x4a002a48 0x130>; + ti,max-irqs = <160>; + ti,max-crossbar-sources = <MAX_SOURCES>; + ti,reg-size = <2>; + ti,irqs-reserved = <0 1 2 3 5 6 131 132>; + ti,irqs-skip = <10 133 139 140>; + ti,irqs-safe-map = <0>; + }; }; }; |