diff options
Diffstat (limited to 'dts/src/arm/imx51.dtsi')
-rw-r--r-- | dts/src/arm/imx51.dtsi | 640 |
1 files changed, 0 insertions, 640 deletions
diff --git a/dts/src/arm/imx51.dtsi b/dts/src/arm/imx51.dtsi deleted file mode 100644 index dea86b98e9..0000000000 --- a/dts/src/arm/imx51.dtsi +++ /dev/null @@ -1,640 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright 2011 Freescale Semiconductor, Inc. -// Copyright 2011 Linaro Ltd. - -#include "imx51-pinfunc.h" -#include <dt-bindings/clock/imx5-clock.h> -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - #address-cells = <1>; - #size-cells = <1>; - /* - * The decompressor and also some bootloaders rely on a - * pre-existing /chosen node to be available to insert the - * command line and merge other ATAGS info. - */ - chosen {}; - - aliases { - ethernet0 = &fec; - gpio0 = &gpio1; - gpio1 = &gpio2; - gpio2 = &gpio3; - gpio3 = &gpio4; - i2c0 = &i2c1; - i2c1 = &i2c2; - mmc0 = &esdhc1; - mmc1 = &esdhc2; - mmc2 = &esdhc3; - mmc3 = &esdhc4; - serial0 = &uart1; - serial1 = &uart2; - serial2 = &uart3; - spi0 = &ecspi1; - spi1 = &ecspi2; - spi2 = &cspi; - }; - - tzic: tz-interrupt-controller@e0000000 { - compatible = "fsl,imx51-tzic", "fsl,tzic"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0xe0000000 0x4000>; - }; - - clocks { - ckil { - compatible = "fsl,imx-ckil", "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - - ckih1 { - compatible = "fsl,imx-ckih1", "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - ckih2 { - compatible = "fsl,imx-ckih2", "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - osc { - compatible = "fsl,imx-osc", "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - cpu: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a8"; - reg = <0>; - clock-latency = <62500>; - clocks = <&clks IMX5_CLK_CPU_PODF>; - clock-names = "cpu"; - operating-points = < - 166000 1000000 - 600000 1050000 - 800000 1100000 - >; - voltage-tolerance = <5>; - }; - }; - - pmu: pmu { - compatible = "arm,cortex-a8-pmu"; - interrupt-parent = <&tzic>; - interrupts = <77>; - }; - - usbphy0: usbphy0 { - compatible = "usb-nop-xceiv"; - clocks = <&clks IMX5_CLK_USB_PHY_GATE>; - clock-names = "main_clk"; - #phy-cells = <0>; - }; - - display-subsystem { - compatible = "fsl,imx-display-subsystem"; - ports = <&ipu_di0>, <&ipu_di1>; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - interrupt-parent = <&tzic>; - ranges; - - iram: sram@1ffe0000 { - compatible = "mmio-sram"; - reg = <0x1ffe0000 0x20000>; - }; - - gpu: gpu@30000000 { - compatible = "amd,imageon-200.1", "amd,imageon"; - reg = <0x30000000 0x20000>; - reg-names = "kgsl_3d0_reg_memory"; - interrupts = <12>; - interrupt-names = "kgsl_3d0_irq"; - clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>; - clock-names = "core_clk", "mem_iface_clk"; - }; - - ipu: ipu@40000000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx51-ipu"; - reg = <0x40000000 0x20000000>; - interrupts = <11 10>; - clocks = <&clks IMX5_CLK_IPU_GATE>, - <&clks IMX5_CLK_IPU_DI0_GATE>, - <&clks IMX5_CLK_IPU_DI1_GATE>; - clock-names = "bus", "di0", "di1"; - resets = <&src 2>; - - ipu_di0: port@2 { - reg = <2>; - - ipu_di0_disp1: endpoint { - }; - }; - - ipu_di1: port@3 { - reg = <3>; - - ipu_di1_disp2: endpoint { - }; - }; - }; - - aips@70000000 { /* AIPS1 */ - compatible = "fsl,aips-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x70000000 0x10000000>; - ranges; - - spba@70000000 { - compatible = "fsl,spba-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x70000000 0x40000>; - ranges; - - esdhc1: esdhc@70004000 { - compatible = "fsl,imx51-esdhc"; - reg = <0x70004000 0x4000>; - interrupts = <1>; - clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>, - <&clks IMX5_CLK_DUMMY>, - <&clks IMX5_CLK_ESDHC1_PER_GATE>; - clock-names = "ipg", "ahb", "per"; - status = "disabled"; - }; - - esdhc2: esdhc@70008000 { - compatible = "fsl,imx51-esdhc"; - reg = <0x70008000 0x4000>; - interrupts = <2>; - clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>, - <&clks IMX5_CLK_DUMMY>, - <&clks IMX5_CLK_ESDHC2_PER_GATE>; - clock-names = "ipg", "ahb", "per"; - bus-width = <4>; - status = "disabled"; - }; - - uart3: serial@7000c000 { - compatible = "fsl,imx51-uart", "fsl,imx21-uart"; - reg = <0x7000c000 0x4000>; - interrupts = <33>; - clocks = <&clks IMX5_CLK_UART3_IPG_GATE>, - <&clks IMX5_CLK_UART3_PER_GATE>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - ecspi1: spi@70010000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx51-ecspi"; - reg = <0x70010000 0x4000>; - interrupts = <36>; - clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>, - <&clks IMX5_CLK_ECSPI1_PER_GATE>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - ssi2: ssi@70014000 { - #sound-dai-cells = <0>; - compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; - reg = <0x70014000 0x4000>; - interrupts = <30>; - clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>, - <&clks IMX5_CLK_SSI2_ROOT_GATE>; - clock-names = "ipg", "baud"; - dmas = <&sdma 24 1 0>, - <&sdma 25 1 0>; - dma-names = "rx", "tx"; - fsl,fifo-depth = <15>; - status = "disabled"; - }; - - esdhc3: esdhc@70020000 { - compatible = "fsl,imx51-esdhc"; - reg = <0x70020000 0x4000>; - interrupts = <3>; - clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>, - <&clks IMX5_CLK_DUMMY>, - <&clks IMX5_CLK_ESDHC3_PER_GATE>; - clock-names = "ipg", "ahb", "per"; - bus-width = <4>; - status = "disabled"; - }; - - esdhc4: esdhc@70024000 { - compatible = "fsl,imx51-esdhc"; - reg = <0x70024000 0x4000>; - interrupts = <4>; - clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>, - <&clks IMX5_CLK_DUMMY>, - <&clks IMX5_CLK_ESDHC4_PER_GATE>; - clock-names = "ipg", "ahb", "per"; - bus-width = <4>; - status = "disabled"; - }; - }; - - aipstz1: bridge@73f00000 { - compatible = "fsl,imx51-aipstz"; - reg = <0x73f00000 0x60>; - }; - - usbotg: usb@73f80000 { - compatible = "fsl,imx51-usb", "fsl,imx27-usb"; - reg = <0x73f80000 0x0200>; - interrupts = <18>; - clocks = <&clks IMX5_CLK_USBOH3_GATE>; - fsl,usbmisc = <&usbmisc 0>; - fsl,usbphy = <&usbphy0>; - status = "disabled"; - }; - - usbh1: usb@73f80200 { - compatible = "fsl,imx51-usb", "fsl,imx27-usb"; - reg = <0x73f80200 0x0200>; - interrupts = <14>; - clocks = <&clks IMX5_CLK_USBOH3_GATE>; - fsl,usbmisc = <&usbmisc 1>; - dr_mode = "host"; - status = "disabled"; - }; - - usbh2: usb@73f80400 { - compatible = "fsl,imx51-usb", "fsl,imx27-usb"; - reg = <0x73f80400 0x0200>; - interrupts = <16>; - clocks = <&clks IMX5_CLK_USBOH3_GATE>; - fsl,usbmisc = <&usbmisc 2>; - dr_mode = "host"; - status = "disabled"; - }; - - usbh3: usb@73f80600 { - compatible = "fsl,imx51-usb", "fsl,imx27-usb"; - reg = <0x73f80600 0x0200>; - interrupts = <17>; - clocks = <&clks IMX5_CLK_USBOH3_GATE>; - fsl,usbmisc = <&usbmisc 3>; - dr_mode = "host"; - status = "disabled"; - }; - - usbmisc: usbmisc@73f80800 { - #index-cells = <1>; - compatible = "fsl,imx51-usbmisc"; - reg = <0x73f80800 0x200>; - clocks = <&clks IMX5_CLK_USBOH3_GATE>; - }; - - gpio1: gpio@73f84000 { - compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; - reg = <0x73f84000 0x4000>; - interrupts = <50 51>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@73f88000 { - compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; - reg = <0x73f88000 0x4000>; - interrupts = <52 53>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@73f8c000 { - compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; - reg = <0x73f8c000 0x4000>; - interrupts = <54 55>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio4: gpio@73f90000 { - compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; - reg = <0x73f90000 0x4000>; - interrupts = <56 57>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - kpp: kpp@73f94000 { - compatible = "fsl,imx51-kpp", "fsl,imx21-kpp"; - reg = <0x73f94000 0x4000>; - interrupts = <60>; - clocks = <&clks IMX5_CLK_DUMMY>; - status = "disabled"; - }; - - wdog1: wdog@73f98000 { - compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; - reg = <0x73f98000 0x4000>; - interrupts = <58>; - clocks = <&clks IMX5_CLK_DUMMY>; - }; - - wdog2: wdog@73f9c000 { - compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; - reg = <0x73f9c000 0x4000>; - interrupts = <59>; - clocks = <&clks IMX5_CLK_DUMMY>; - status = "disabled"; - }; - - gpt: timer@73fa0000 { - compatible = "fsl,imx51-gpt", "fsl,imx31-gpt"; - reg = <0x73fa0000 0x4000>; - interrupts = <39>; - clocks = <&clks IMX5_CLK_GPT_IPG_GATE>, - <&clks IMX5_CLK_GPT_HF_GATE>; - clock-names = "ipg", "per"; - }; - - iomuxc: iomuxc@73fa8000 { - compatible = "fsl,imx51-iomuxc"; - reg = <0x73fa8000 0x4000>; - }; - - pwm1: pwm@73fb4000 { - #pwm-cells = <2>; - compatible = "fsl,imx51-pwm", "fsl,imx27-pwm"; - reg = <0x73fb4000 0x4000>; - clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>, - <&clks IMX5_CLK_PWM1_HF_GATE>; - clock-names = "ipg", "per"; - interrupts = <61>; - }; - - pwm2: pwm@73fb8000 { - #pwm-cells = <2>; - compatible = "fsl,imx51-pwm", "fsl,imx27-pwm"; - reg = <0x73fb8000 0x4000>; - clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>, - <&clks IMX5_CLK_PWM2_HF_GATE>; - clock-names = "ipg", "per"; - interrupts = <94>; - }; - - uart1: serial@73fbc000 { - compatible = "fsl,imx51-uart", "fsl,imx21-uart"; - reg = <0x73fbc000 0x4000>; - interrupts = <31>; - clocks = <&clks IMX5_CLK_UART1_IPG_GATE>, - <&clks IMX5_CLK_UART1_PER_GATE>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - uart2: serial@73fc0000 { - compatible = "fsl,imx51-uart", "fsl,imx21-uart"; - reg = <0x73fc0000 0x4000>; - interrupts = <32>; - clocks = <&clks IMX5_CLK_UART2_IPG_GATE>, - <&clks IMX5_CLK_UART2_PER_GATE>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - src: src@73fd0000 { - compatible = "fsl,imx51-src"; - reg = <0x73fd0000 0x4000>; - #reset-cells = <1>; - }; - - clks: ccm@73fd4000{ - compatible = "fsl,imx51-ccm"; - reg = <0x73fd4000 0x4000>; - interrupts = <0 71 0x04 0 72 0x04>; - #clock-cells = <1>; - }; - }; - - aips@80000000 { /* AIPS2 */ - compatible = "fsl,aips-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x80000000 0x10000000>; - ranges; - - aipstz2: bridge@83f00000 { - compatible = "fsl,imx51-aipstz"; - reg = <0x83f00000 0x60>; - }; - - iim: iim@83f98000 { - compatible = "fsl,imx51-iim", "fsl,imx27-iim"; - reg = <0x83f98000 0x4000>; - interrupts = <69>; - clocks = <&clks IMX5_CLK_IIM_GATE>; - }; - - tigerp: tigerp@83fa0000 { - compatible = "fsl,imx51-tigerp"; - reg = <0x83fa0000 0x28>; - }; - - owire: owire@83fa4000 { - compatible = "fsl,imx51-owire", "fsl,imx21-owire"; - reg = <0x83fa4000 0x4000>; - interrupts = <88>; - clocks = <&clks IMX5_CLK_OWIRE_GATE>; - status = "disabled"; - }; - - ecspi2: spi@83fac000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx51-ecspi"; - reg = <0x83fac000 0x4000>; - interrupts = <37>; - clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>, - <&clks IMX5_CLK_ECSPI2_PER_GATE>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - sdma: sdma@83fb0000 { - compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; - reg = <0x83fb0000 0x4000>; - interrupts = <6>; - clocks = <&clks IMX5_CLK_SDMA_GATE>, - <&clks IMX5_CLK_AHB>; - clock-names = "ipg", "ahb"; - #dma-cells = <3>; - fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin"; - }; - - cspi: spi@83fc0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; - reg = <0x83fc0000 0x4000>; - interrupts = <38>; - clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>, - <&clks IMX5_CLK_CSPI_IPG_GATE>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - i2c2: i2c@83fc4000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; - reg = <0x83fc4000 0x4000>; - interrupts = <63>; - clocks = <&clks IMX5_CLK_I2C2_GATE>; - status = "disabled"; - }; - - i2c1: i2c@83fc8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; - reg = <0x83fc8000 0x4000>; - interrupts = <62>; - clocks = <&clks IMX5_CLK_I2C1_GATE>; - status = "disabled"; - }; - - ssi1: ssi@83fcc000 { - #sound-dai-cells = <0>; - compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; - reg = <0x83fcc000 0x4000>; - interrupts = <29>; - clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>, - <&clks IMX5_CLK_SSI1_ROOT_GATE>; - clock-names = "ipg", "baud"; - dmas = <&sdma 28 0 0>, - <&sdma 29 0 0>; - dma-names = "rx", "tx"; - fsl,fifo-depth = <15>; - status = "disabled"; - }; - - audmux: audmux@83fd0000 { - compatible = "fsl,imx51-audmux", "fsl,imx31-audmux"; - reg = <0x83fd0000 0x4000>; - clocks = <&clks IMX5_CLK_DUMMY>; - clock-names = "audmux"; - status = "disabled"; - }; - - m4if: m4if@83fd8000 { - compatible = "fsl,imx51-m4if"; - reg = <0x83fd8000 0x1000>; - }; - - weim: weim@83fda000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,imx51-weim"; - reg = <0x83fda000 0x1000>; - clocks = <&clks IMX5_CLK_EMI_SLOW_GATE>; - ranges = < - 0 0 0xb0000000 0x08000000 - 1 0 0xb8000000 0x08000000 - 2 0 0xc0000000 0x08000000 - 3 0 0xc8000000 0x04000000 - 4 0 0xcc000000 0x02000000 - 5 0 0xce000000 0x02000000 - >; - status = "disabled"; - }; - - nfc: nand@83fdb000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,imx51-nand"; - reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>; - interrupts = <8>; - clocks = <&clks IMX5_CLK_NFC_GATE>; - status = "disabled"; - }; - - pata: pata@83fe0000 { - compatible = "fsl,imx51-pata", "fsl,imx27-pata"; - reg = <0x83fe0000 0x4000>; - interrupts = <70>; - clocks = <&clks IMX5_CLK_PATA_GATE>; - status = "disabled"; - }; - - ssi3: ssi@83fe8000 { - #sound-dai-cells = <0>; - compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; - reg = <0x83fe8000 0x4000>; - interrupts = <96>; - clocks = <&clks IMX5_CLK_SSI3_IPG_GATE>, - <&clks IMX5_CLK_SSI3_ROOT_GATE>; - clock-names = "ipg", "baud"; - dmas = <&sdma 46 0 0>, - <&sdma 47 0 0>; - dma-names = "rx", "tx"; - fsl,fifo-depth = <15>; - status = "disabled"; - }; - - fec: ethernet@83fec000 { - compatible = "fsl,imx51-fec", "fsl,imx27-fec"; - reg = <0x83fec000 0x4000>; - interrupts = <87>; - clocks = <&clks IMX5_CLK_FEC_GATE>, - <&clks IMX5_CLK_FEC_GATE>, - <&clks IMX5_CLK_FEC_GATE>; - clock-names = "ipg", "ahb", "ptp"; - status = "disabled"; - }; - - vpu: vpu@83ff4000 { - compatible = "fsl,imx51-vpu", "cnm,codahx4"; - reg = <0x83ff4000 0x1000>; - interrupts = <9>; - clocks = <&clks IMX5_CLK_VPU_REFERENCE_GATE>, - <&clks IMX5_CLK_VPU_GATE>; - clock-names = "per", "ahb"; - resets = <&src 1>; - iram = <&iram>; - }; - - sahara: crypto@83ff8000 { - compatible = "fsl,imx53-sahara", "fsl,imx51-sahara"; - reg = <0x83ff8000 0x4000>; - interrupts = <19 20>; - clocks = <&clks IMX5_CLK_SAHARA_IPG_GATE>, - <&clks IMX5_CLK_SAHARA_IPG_GATE>; - clock-names = "ipg", "ahb"; - }; - }; - }; -}; |