diff options
Diffstat (limited to 'dts/src/arm/imx51.dtsi')
| -rw-r--r-- | dts/src/arm/imx51.dtsi | 61 |
1 files changed, 50 insertions, 11 deletions
diff --git a/dts/src/arm/imx51.dtsi b/dts/src/arm/imx51.dtsi index fe01b890c7..5c4ba91e43 100644 --- a/dts/src/arm/imx51.dtsi +++ b/dts/src/arm/imx51.dtsi @@ -93,18 +93,17 @@ }; }; - usbphy { - #address-cells = <1>; - #size-cells = <0>; - compatible = "simple-bus"; + pmu: pmu { + compatible = "arm,cortex-a8-pmu"; + interrupt-parent = <&tzic>; + interrupts = <77>; + }; - usbphy0: usbphy@0 { - compatible = "usb-nop-xceiv"; - reg = <0>; - clocks = <&clks IMX5_CLK_USB_PHY_GATE>; - clock-names = "main_clk"; - #phy-cells = <0>; - }; + usbphy0: usbphy0 { + compatible = "usb-nop-xceiv"; + clocks = <&clks IMX5_CLK_USB_PHY_GATE>; + clock-names = "main_clk"; + #phy-cells = <0>; }; display-subsystem { @@ -250,6 +249,11 @@ }; }; + aipstz1: bridge@73f00000 { + compatible = "fsl,imx51-aipstz"; + reg = <0x73f00000 0x60>; + }; + usbotg: usb@73f80000 { compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80000 0x0200>; @@ -435,6 +439,11 @@ reg = <0x80000000 0x10000000>; ranges; + aipstz2: bridge@83f00000 { + compatible = "fsl,imx51-aipstz"; + reg = <0x83f00000 0x60>; + }; + iim: iim@83f98000 { compatible = "fsl,imx51-iim", "fsl,imx27-iim"; reg = <0x83f98000 0x4000>; @@ -442,6 +451,11 @@ clocks = <&clks IMX5_CLK_IIM_GATE>; }; + tigerp: tigerp@83fa0000 { + compatible = "fsl,imx51-tigerp"; + reg = <0x83fa0000 0x28>; + }; + owire: owire@83fa4000 { compatible = "fsl,imx51-owire", "fsl,imx21-owire"; reg = <0x83fa4000 0x4000>; @@ -528,6 +542,11 @@ status = "disabled"; }; + m4if: m4if@83fd8000 { + compatible = "fsl,imx51-m4if"; + reg = <0x83fd8000 0x1000>; + }; + weim: weim@83fda000 { #address-cells = <2>; #size-cells = <1>; @@ -588,6 +607,26 @@ clock-names = "ipg", "ahb", "ptp"; status = "disabled"; }; + + vpu@83ff4000 { + compatible = "fsl,imx51-vpu", "cnm,codahx4"; + reg = <0x83ff4000 0x1000>; + interrupts = <9>; + clocks = <&clks IMX5_CLK_VPU_REFERENCE_GATE>, + <&clks IMX5_CLK_VPU_GATE>; + clock-names = "per", "ahb"; + resets = <&src 1>; + iram = <&iram>; + }; + + sahara: crypto@83ff8000 { + compatible = "fsl,imx53-sahara", "fsl,imx51-sahara"; + reg = <0x83ff8000 0x4000>; + interrupts = <19 20>; + clocks = <&clks IMX5_CLK_SAHARA_IPG_GATE>, + <&clks IMX5_CLK_SAHARA_IPG_GATE>; + clock-names = "ipg", "ahb"; + }; }; }; }; |