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-rw-r--r--dts/src/arm/integratorap.dts51
1 files changed, 50 insertions, 1 deletions
diff --git a/dts/src/arm/integratorap.dts b/dts/src/arm/integratorap.dts
index 4b34b54e09..6f16d09dc5 100644
--- a/dts/src/arm/integratorap.dts
+++ b/dts/src/arm/integratorap.dts
@@ -19,7 +19,7 @@
bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
};
- /* 24 MHz chrystal on the core module */
+ /* 24 MHz chrystal on the Integrator/AP development board */
xtal24mhz: xtal24mhz@24M {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -39,6 +39,34 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <14745600>;
+ clocks = <&xtal24mhz>;
+ };
+
+ core-module@10000000 {
+ /* 24 MHz chrystal on the core module */
+ cm24mhz: cm24mhz@24M {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ };
+
+ /* Oscillator on the core module, clocks the CPU core */
+ cmosc: cmosc@24M {
+ compatible = "arm,syscon-icst525-integratorap-cm";
+ #clock-cells = <0>;
+ lock-offset = <0x14>;
+ vco-offset = <0x08>;
+ clocks = <&cm24mhz>;
+ };
+
+ /* Auxilary oscillator on the core module, 32.369MHz at boot */
+ auxosc: auxosc@24M {
+ compatible = "arm,syscon-icst525";
+ #clock-cells = <0>;
+ lock-offset = <0x14>;
+ vco-offset = <0x1c>;
+ clocks = <&cm24mhz>;
+ };
};
syscon {
@@ -47,6 +75,27 @@
interrupt-parent = <&pic>;
/* These are the logical module IRQs */
interrupts = <9>, <10>, <11>, <12>;
+
+ /*
+ * SYSCLK clocks PCIv3 bridge, system controller and the
+ * logic modules.
+ */
+ sysclk: apsys@24M {
+ compatible = "arm,syscon-icst525-integratorap-sys";
+ #clock-cells = <0>;
+ lock-offset = <0x1c>;
+ vco-offset = <0x04>;
+ clocks = <&xtal24mhz>;
+ };
+
+ /* One-bit control for the PCI bus clock (33 or 25 MHz) */
+ pciclk: pciclk@24M {
+ compatible = "arm,syscon-icst525-integratorap-pci";
+ #clock-cells = <0>;
+ lock-offset = <0x1c>;
+ vco-offset = <0x04>;
+ clocks = <&xtal24mhz>;
+ };
};
timer0: timer@13000000 {