diff options
Diffstat (limited to 'dts/src/arm/meson8b.dtsi')
| -rw-r--r-- | dts/src/arm/meson8b.dtsi | 83 |
1 files changed, 73 insertions, 10 deletions
diff --git a/dts/src/arm/meson8b.dtsi b/dts/src/arm/meson8b.dtsi index 22d7754607..fe84a8c3ce 100644 --- a/dts/src/arm/meson8b.dtsi +++ b/dts/src/arm/meson8b.dtsi @@ -158,6 +158,32 @@ }; }; + gpu_opp_table: gpu-opp-table { + compatible = "operating-points-v2"; + + opp-255000000 { + opp-hz = /bits/ 64 <255000000>; + opp-microvolt = <1150000>; + }; + opp-364300000 { + opp-hz = /bits/ 64 <364300000>; + opp-microvolt = <1150000>; + }; + opp-425000000 { + opp-hz = /bits/ 64 <425000000>; + opp-microvolt = <1150000>; + }; + opp-510000000 { + opp-hz = /bits/ 64 <510000000>; + opp-microvolt = <1150000>; + }; + opp-637500000 { + opp-hz = /bits/ 64 <637500000>; + opp-microvolt = <1150000>; + turbo-mode; + }; + }; + pmu { compatible = "arm,cortex-a5-pmu"; interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, @@ -178,6 +204,34 @@ no-map; }; }; + + apb: bus@d0000000 { + compatible = "simple-bus"; + reg = <0xd0000000 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xd0000000 0x200000>; + + mali: gpu@c0000 { + compatible = "amlogic,meson8b-mali", "arm,mali-450"; + reg = <0xc0000 0x40000>; + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gp", "gpmmu", "pp", "pmu", + "pp0", "ppmmu0", "pp1", "ppmmu1"; + resets = <&reset RESET_MALI>; + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; + clock-names = "bus", "core"; + operating-points-v2 = <&gpu_opp_table>; + switch-delay = <0xffff>; + }; + }; }; /* end of / */ &aobus { @@ -222,13 +276,6 @@ }; &cbus { - clkc: clock-controller@4000 { - #clock-cells = <1>; - #reset-cells = <1>; - compatible = "amlogic,meson8b-clkc"; - reg = <0x8000 0x4>, <0x4000 0x400>; - }; - reset: reset-controller@4404 { compatible = "amlogic,meson8b-reset"; reg = <0x4404 0x9c>; @@ -270,9 +317,7 @@ groups = "eth_tx_clk", "eth_tx_en", "eth_txd1_0", - "eth_txd1_1", "eth_txd0_0", - "eth_txd0_1", "eth_rx_clk", "eth_rx_dv", "eth_rxd1", @@ -281,7 +326,9 @@ "eth_mdc", "eth_ref_clk", "eth_txd2", - "eth_txd3"; + "eth_txd3", + "eth_rxd3", + "eth_rxd2"; function = "ethernet"; bias-disable; }; @@ -360,6 +407,11 @@ compatible = "amlogic,meson8b-efuse"; clocks = <&clkc CLKID_EFUSE>; clock-names = "core"; + + temperature_calib: calib@1f4 { + /* only the upper two bytes are relevant */ + reg = <0x1f4 0x4>; + }; }; ðmac { @@ -383,6 +435,14 @@ status = "okay"; }; +&hhi { + clkc: clock-controller { + compatible = "amlogic,meson8-clkc"; + #clock-cells = <1>; + #reset-cells = <1>; + }; +}; + &hwrng { compatible = "amlogic,meson8b-rng", "amlogic,meson-rng"; clocks = <&clkc CLKID_RNG0>; @@ -450,6 +510,9 @@ clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_SAR_ADC>; clock-names = "clkin", "core"; + amlogic,hhi-sysctrl = <&hhi>; + nvmem-cells = <&temperature_calib>; + nvmem-cell-names = "temperature_calib"; }; &sdio { |