diff options
Diffstat (limited to 'dts/src/arm/meson8b.dtsi')
| -rw-r--r-- | dts/src/arm/meson8b.dtsi | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/dts/src/arm/meson8b.dtsi b/dts/src/arm/meson8b.dtsi index 2401cdf5f7..c02b03cbcd 100644 --- a/dts/src/arm/meson8b.dtsi +++ b/dts/src/arm/meson8b.dtsi @@ -10,6 +10,7 @@ #include <dt-bindings/power/meson8-power.h> #include <dt-bindings/reset/amlogic,meson8b-reset.h> #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> +#include <dt-bindings/thermal/thermal.h> #include "meson.dtsi" / { @@ -26,6 +27,7 @@ resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>; operating-points-v2 = <&cpu_opp_table>; clocks = <&clkc CLKID_CPUCLK>; + #cooling-cells = <2>; /* min followed by max */ }; cpu1: cpu@201 { @@ -37,6 +39,7 @@ resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>; operating-points-v2 = <&cpu_opp_table>; clocks = <&clkc CLKID_CPUCLK>; + #cooling-cells = <2>; /* min followed by max */ }; cpu2: cpu@202 { @@ -48,6 +51,7 @@ resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>; operating-points-v2 = <&cpu_opp_table>; clocks = <&clkc CLKID_CPUCLK>; + #cooling-cells = <2>; /* min followed by max */ }; cpu3: cpu@203 { @@ -59,6 +63,7 @@ resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>; operating-points-v2 = <&cpu_opp_table>; clocks = <&clkc CLKID_CPUCLK>; + #cooling-cells = <2>; /* min followed by max */ }; }; @@ -167,6 +172,54 @@ }; }; + thermal-zones { + soc { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + thermal-sensors = <&thermal_sensor>; + + cooling-maps { + map0 { + trip = <&soc_passive>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map1 { + trip = <&soc_hot>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + + trips { + soc_passive: soc-passive { + temperature = <80000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + + soc_hot: soc-hot { + temperature = <90000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "hot"; + }; + + soc_critical: soc-critical { + temperature = <110000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "critical"; + }; + }; + }; + }; + mmcbus: bus@c8000000 { compatible = "simple-bus"; reg = <0xc8000000 0x8000>; @@ -221,6 +274,7 @@ clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; clock-names = "bus", "core"; operating-points-v2 = <&gpu_opp_table>; + #cooling-cells = <2>; /* min followed by max */ }; }; }; /* end of / */ @@ -266,6 +320,14 @@ }; }; +&ao_arc_rproc { + compatible= "amlogic,meson8b-ao-arc", "amlogic,meson-mx-ao-arc"; + amlogic,secbus2 = <&secbus2>; + sram = <&ao_arc_sram>; + resets = <&reset RESET_MEDIA_CPU>; + clocks = <&clkc CLKID_AO_MEDIA_CPU>; +}; + &cbus { reset: reset-controller@4404 { compatible = "amlogic,meson8b-reset"; @@ -410,6 +472,12 @@ }; &ahb_sram { + ao_arc_sram: ao-arc-sram@0 { + compatible = "amlogic,meson8b-ao-arc-sram"; + reg = <0x0 0x8000>; + pool; + }; + smp-sram@1ff80 { compatible = "amlogic,meson8b-smp-sram"; reg = <0x1ff80 0x8>; @@ -574,6 +642,13 @@ clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk"; }; +&secbus { + secbus2: system-controller@4000 { + compatible = "amlogic,meson8b-secbus2", "syscon"; + reg = <0x4000 0x2000>; + }; +}; + &sdio { compatible = "amlogic,meson8b-sdio", "amlogic,meson-mx-sdio"; clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>; |