diff options
Diffstat (limited to 'dts/src/arm/r8a7745-sk-rzg1e.dts')
-rw-r--r-- | dts/src/arm/r8a7745-sk-rzg1e.dts | 72 |
1 files changed, 0 insertions, 72 deletions
diff --git a/dts/src/arm/r8a7745-sk-rzg1e.dts b/dts/src/arm/r8a7745-sk-rzg1e.dts deleted file mode 100644 index 59d1a9bfab..0000000000 --- a/dts/src/arm/r8a7745-sk-rzg1e.dts +++ /dev/null @@ -1,72 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the SK-RZG1E board - * - * Copyright (C) 2016-2017 Cogent Embedded, Inc. - */ - -/dts-v1/; -#include "r8a7745.dtsi" - -/ { - model = "SK-RZG1E"; - compatible = "renesas,sk-rzg1e", "renesas,r8a7745"; - - aliases { - serial0 = &scif2; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; - stdout-path = "serial0:115200n8"; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x40000000>; - }; -}; - -&extal_clk { - clock-frequency = <20000000>; -}; - -&pfc { - scif2_pins: scif2 { - groups = "scif2_data"; - function = "scif2"; - }; - - ether_pins: ether { - groups = "eth_link", "eth_mdio", "eth_rmii"; - function = "eth"; - }; - - phy1_pins: phy1 { - groups = "intc_irq8"; - function = "intc"; - }; -}; - -&scif2 { - pinctrl-0 = <&scif2_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -ðer { - pinctrl-0 = <ðer_pins>, <&phy1_pins>; - pinctrl-names = "default"; - - phy-handle = <&phy1>; - renesas,ether-link-active-low; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - interrupt-parent = <&irqc>; - interrupts = <8 IRQ_TYPE_LEVEL_LOW>; - micrel,led-mode = <1>; - }; -}; |