diff options
Diffstat (limited to 'dts/src/arm/r8a7790.dtsi')
| -rw-r--r-- | dts/src/arm/r8a7790.dtsi | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/dts/src/arm/r8a7790.dtsi b/dts/src/arm/r8a7790.dtsi index 351fcc2f87..0c8900d4b8 100644 --- a/dts/src/arm/r8a7790.dtsi +++ b/dts/src/arm/r8a7790.dtsi @@ -711,7 +711,7 @@ scifb0: serial@e6c20000 { compatible = "renesas,scifb-r8a7790", "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6c20000 0 64>; + reg = <0 0xe6c20000 0 0x100>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>; clock-names = "fck"; @@ -725,7 +725,7 @@ scifb1: serial@e6c30000 { compatible = "renesas,scifb-r8a7790", "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6c30000 0 64>; + reg = <0 0xe6c30000 0 0x100>; interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>; clock-names = "fck"; @@ -739,7 +739,7 @@ scifb2: serial@e6ce0000 { compatible = "renesas,scifb-r8a7790", "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6ce0000 0 64>; + reg = <0 0xe6ce0000 0 0x100>; interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>; clock-names = "fck"; @@ -1471,6 +1471,16 @@ }; }; + prr: chipid@ff000044 { + compatible = "renesas,prr"; + reg = <0 0xff000044 0 4>; + }; + + rst: reset-controller@e6160000 { + compatible = "renesas,r8a7790-rst"; + reg = <0 0xe6160000 0 0x0100>; + }; + sysc: system-controller@e6180000 { compatible = "renesas,r8a7790-sysc"; reg = <0 0xe6180000 0 0x0200>; |