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Diffstat (limited to 'dts/src/arm/r8a7793.dtsi')
-rw-r--r--dts/src/arm/r8a7793.dtsi228
1 files changed, 146 insertions, 82 deletions
diff --git a/dts/src/arm/r8a7793.dtsi b/dts/src/arm/r8a7793.dtsi
index b482159452..1dd6d202cd 100644
--- a/dts/src/arm/r8a7793.dtsi
+++ b/dts/src/arm/r8a7793.dtsi
@@ -11,6 +11,7 @@
#include <dt-bindings/clock/r8a7793-clock.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/power/r8a7793-sysc.h>
/ {
compatible = "renesas,r8a7793";
@@ -43,6 +44,7 @@
voltage-tolerance = <1>; /* 1% */
clocks = <&cpg_clocks R8A7793_CLK_Z>;
clock-latency = <300000>; /* 300 us */
+ power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
/* kHz - uV - OPPs unknown yet */
operating-points = <1500000 1000000>,
@@ -76,6 +78,7 @@
L2_CA15: cache-controller@0 {
compatible = "cache";
+ power-domains = <&sysc R8A7793_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
};
@@ -102,7 +105,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO0>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio1: gpio@e6051000 {
@@ -115,7 +118,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO1>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio2: gpio@e6052000 {
@@ -128,7 +131,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO2>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio3: gpio@e6053000 {
@@ -141,7 +144,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO3>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio4: gpio@e6054000 {
@@ -154,7 +157,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO4>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio5: gpio@e6055000 {
@@ -167,7 +170,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO5>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio6: gpio@e6055400 {
@@ -180,7 +183,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO6>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio7: gpio@e6055800 {
@@ -193,7 +196,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO7>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
thermal: thermal@e61f0000 {
@@ -203,7 +206,7 @@
reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp5_clks R8A7793_CLK_THERMAL>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
#thermal-sensor-cells = <0>;
};
@@ -222,7 +225,7 @@
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7793_CLK_CMT0>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
renesas,channels-mask = <0x60>;
@@ -242,7 +245,7 @@
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7793_CLK_CMT1>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
renesas,channels-mask = <0xff>;
@@ -265,7 +268,7 @@
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R8A7793_CLK_IRQC>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
dmac0: dma-controller@e6700000 {
@@ -294,7 +297,7 @@
"ch12", "ch13", "ch14";
clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -325,7 +328,7 @@
"ch12", "ch13", "ch14";
clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -354,7 +357,7 @@
"ch12";
clocks = <&mstp5_clks R8A7793_CLK_AUDIO_DMAC0>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <13>;
};
@@ -383,7 +386,7 @@
"ch12";
clocks = <&mstp5_clks R8A7793_CLK_AUDIO_DMAC1>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <13>;
};
@@ -396,7 +399,7 @@
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C0>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -408,7 +411,7 @@
reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C1>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -420,7 +423,7 @@
reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C2>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -432,7 +435,7 @@
reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C3>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -444,7 +447,7 @@
reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C4>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -457,7 +460,7 @@
reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C5>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@@ -472,7 +475,7 @@
clocks = <&mstp9_clks R8A7793_CLK_IICDVFS>;
dmas = <&dmac0 0x77>, <&dmac0 0x78>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -485,7 +488,7 @@
clocks = <&mstp3_clks R8A7793_CLK_IIC0>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -498,7 +501,7 @@
clocks = <&mstp3_clks R8A7793_CLK_IIC1>;
dmas = <&dmac0 0x65>, <&dmac0 0x66>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -507,6 +510,39 @@
reg = <0 0xe6060000 0 0x250>;
};
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7793";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7793_CLK_SDHI0>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ sdhi1: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a7793";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7793_CLK_SDHI1>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ sdhi2: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a7793";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7793_CLK_SDHI2>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
scifa0: serial@e6c40000 {
compatible = "renesas,scifa-r8a7793",
"renesas,rcar-gen2-scifa", "renesas,scifa";
@@ -516,7 +552,7 @@
clock-names = "fck";
dmas = <&dmac0 0x21>, <&dmac0 0x22>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -529,7 +565,7 @@
clock-names = "fck";
dmas = <&dmac0 0x25>, <&dmac0 0x26>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -542,7 +578,7 @@
clock-names = "fck";
dmas = <&dmac0 0x27>, <&dmac0 0x28>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -555,7 +591,7 @@
clock-names = "fck";
dmas = <&dmac0 0x1b>, <&dmac0 0x1c>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -568,7 +604,7 @@
clock-names = "fck";
dmas = <&dmac0 0x1f>, <&dmac0 0x20>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -581,7 +617,7 @@
clock-names = "fck";
dmas = <&dmac0 0x23>, <&dmac0 0x24>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -594,7 +630,7 @@
clock-names = "fck";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -607,7 +643,7 @@
clock-names = "fck";
dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -620,7 +656,7 @@
clock-names = "fck";
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -634,7 +670,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -648,7 +684,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -662,7 +698,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -676,7 +712,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2f>, <&dmac0 0x30>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -690,7 +726,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -704,7 +740,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0xfd>, <&dmac0 0xfe>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -718,7 +754,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -732,7 +768,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -746,7 +782,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -755,7 +791,7 @@
reg = <0 0xee700000 0 0x400>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp8_clks R8A7793_CLK_ETHER>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
@@ -769,7 +805,7 @@
clocks = <&mstp9_clks R8A7793_CLK_QSPI_MOD>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>;
dma-names = "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -806,18 +842,39 @@
};
};
+ can0: can@e6e80000 {
+ compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7793_CLK_RCAN0>,
+ <&cpg_clocks R8A7793_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ can1: can@e6e88000 {
+ compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7793_CLK_RCAN1>,
+ <&cpg_clocks R8A7793_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
clocks {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* External root clock */
- extal_clk: extal_clk {
+ extal_clk: extal {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
- clock-output-names = "extal";
};
/*
@@ -828,19 +885,31 @@
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "audio_clk_a";
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "audio_clk_b";
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "audio_clk_c";
+ };
+
+ /* External USB clock - can be overridden by the board */
+ usb_extal_clk: usb_extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
+
+ /* External CAN clock */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
};
/* External SCIF clock */
@@ -849,7 +918,6 @@
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
- status = "disabled";
};
/* Special CPG clocks */
@@ -857,7 +925,7 @@
compatible = "renesas,r8a7793-cpg-clocks",
"renesas,rcar-gen2-cpg-clocks";
reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>;
+ clocks = <&extal_clk &usb_extal_clk>;
#clock-cells = <1>;
clock-output-names = "main", "pll0", "pll1", "pll3",
"lb", "qspi", "sdh", "sd0", "z",
@@ -866,111 +934,98 @@
};
/* Variable factor clocks */
- sd2_clk: sd2_clk@e6150078 {
+ sd2_clk: sd2@e6150078 {
compatible = "renesas,r8a7793-div6-clock",
"renesas,cpg-div6-clock";
reg = <0 0xe6150078 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "sd2";
};
- sd3_clk: sd3_clk@e615026c {
+ sd3_clk: sd3@e615026c {
compatible = "renesas,r8a7793-div6-clock",
"renesas,cpg-div6-clock";
reg = <0 0xe615026c 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "sd3";
};
- mmc0_clk: mmc0_clk@e6150240 {
+ mmc0_clk: mmc0@e6150240 {
compatible = "renesas,r8a7793-div6-clock",
"renesas,cpg-div6-clock";
reg = <0 0xe6150240 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "mmc0";
};
/* Fixed factor clocks */
- pll1_div2_clk: pll1_div2_clk {
+ pll1_div2_clk: pll1_div2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "pll1_div2";
};
- zg_clk: zg_clk {
+ zg_clk: zg {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <5>;
clock-mult = <1>;
- clock-output-names = "zg";
};
- zx_clk: zx_clk {
+ zx_clk: zx {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <3>;
clock-mult = <1>;
- clock-output-names = "zx";
};
- zs_clk: zs_clk {
+ zs_clk: zs {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <6>;
clock-mult = <1>;
- clock-output-names = "zs";
};
- hp_clk: hp_clk {
+ hp_clk: hp {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <12>;
clock-mult = <1>;
- clock-output-names = "hp";
};
- p_clk: p_clk {
+ p_clk: p {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <24>;
clock-mult = <1>;
- clock-output-names = "p";
};
- m2_clk: m2_clk {
+ m2_clk: m2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
- clock-output-names = "m2";
};
- rclk_clk: rclk_clk {
+ rclk_clk: rclk {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <(48 * 1024)>;
clock-mult = <1>;
- clock-output-names = "rclk";
};
- mp_clk: mp_clk {
+ mp_clk: mp {
compatible = "fixed-factor-clock";
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
clock-div = <15>;
clock-mult = <1>;
- clock-output-names = "mp";
};
- cp_clk: cp_clk {
+ cp_clk: cp {
compatible = "fixed-factor-clock";
clocks = <&extal_clk>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "cp";
};
/* Gate clocks */
@@ -1098,6 +1153,7 @@
reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
<&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+ <&p_clk>, <&p_clk>,
<&cpg_clocks R8A7793_CLK_QSPI>, <&hp_clk>,
<&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
<&hp_clk>, <&hp_clk>;
@@ -1107,7 +1163,8 @@
R8A7793_CLK_GPIO5 R8A7793_CLK_GPIO4
R8A7793_CLK_GPIO3 R8A7793_CLK_GPIO2
R8A7793_CLK_GPIO1 R8A7793_CLK_GPIO0
- R8A7793_CLK_QSPI_MOD R8A7793_CLK_I2C5
+ R8A7793_CLK_QSPI_MOD R8A7793_CLK_RCAN1
+ R8A7793_CLK_RCAN0 R8A7793_CLK_I2C5
R8A7793_CLK_IICDVFS R8A7793_CLK_I2C4
R8A7793_CLK_I2C3 R8A7793_CLK_I2C2
R8A7793_CLK_I2C1 R8A7793_CLK_I2C0
@@ -1115,8 +1172,9 @@
clock-output-names =
"gpio7", "gpio6", "gpio5", "gpio4",
"gpio3", "gpio2", "gpio1", "gpio0",
- "qspi_mod", "i2c5", "i2c6", "i2c4",
- "i2c3", "i2c2", "i2c1", "i2c0";
+ "rcan1", "rcan0", "qspi_mod", "i2c5",
+ "i2c6", "i2c4", "i2c3", "i2c2", "i2c1",
+ "i2c0";
};
mstp10_clks: mstp10_clks@e6150998 {
compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -1166,6 +1224,12 @@
};
};
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7793-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
ipmmu_sy0: mmu@e6280000 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
reg = <0 0xe6280000 0 0x1000>;
@@ -1261,7 +1325,7 @@
"src.4", "src.3", "src.2", "src.1", "src.0",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-16 08:01:44 +0000