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-rw-r--r--dts/src/arm/rk3288.dtsi22
1 files changed, 11 insertions, 11 deletions
diff --git a/dts/src/arm/rk3288.dtsi b/dts/src/arm/rk3288.dtsi
index 4dcdcf17c9..aaaa618757 100644
--- a/dts/src/arm/rk3288.dtsi
+++ b/dts/src/arm/rk3288.dtsi
@@ -100,7 +100,7 @@
};
};
- cpu_opp_table: cpu-opp-table {
+ cpu_opp_table: opp-table-0 {
compatible = "operating-points-v2";
opp-shared;
@@ -1278,7 +1278,7 @@
status = "disabled";
};
- gpu_opp_table: gpu-opp-table {
+ gpu_opp_table: opp-table-1 {
compatible = "operating-points-v2";
opp-100000000 {
@@ -1422,7 +1422,7 @@
#size-cells = <2>;
ranges;
- gpio0: gpio0@ff750000 {
+ gpio0: gpio@ff750000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff750000 0x0 0x100>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
@@ -1435,7 +1435,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@ff780000 {
+ gpio1: gpio@ff780000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
@@ -1448,7 +1448,7 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@ff790000 {
+ gpio2: gpio@ff790000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
@@ -1461,7 +1461,7 @@
#interrupt-cells = <2>;
};
- gpio3: gpio3@ff7a0000 {
+ gpio3: gpio@ff7a0000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7a0000 0x0 0x100>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
@@ -1474,7 +1474,7 @@
#interrupt-cells = <2>;
};
- gpio4: gpio4@ff7b0000 {
+ gpio4: gpio@ff7b0000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7b0000 0x0 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -1487,7 +1487,7 @@
#interrupt-cells = <2>;
};
- gpio5: gpio5@ff7c0000 {
+ gpio5: gpio@ff7c0000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7c0000 0x0 0x100>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
@@ -1500,7 +1500,7 @@
#interrupt-cells = <2>;
};
- gpio6: gpio6@ff7d0000 {
+ gpio6: gpio@ff7d0000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7d0000 0x0 0x100>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
@@ -1513,7 +1513,7 @@
#interrupt-cells = <2>;
};
- gpio7: gpio7@ff7e0000 {
+ gpio7: gpio@ff7e0000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7e0000 0x0 0x100>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
@@ -1526,7 +1526,7 @@
#interrupt-cells = <2>;
};
- gpio8: gpio8@ff7f0000 {
+ gpio8: gpio@ff7f0000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7f0000 0x0 0x100>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;