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-rw-r--r--dts/src/arm/rv1108.dtsi49
1 files changed, 48 insertions, 1 deletions
diff --git a/dts/src/arm/rv1108.dtsi b/dts/src/arm/rv1108.dtsi
index 9bd0acf3b7..24d56849af 100644
--- a/dts/src/arm/rv1108.dtsi
+++ b/dts/src/arm/rv1108.dtsi
@@ -265,6 +265,11 @@
#address-cells = <1>;
#size-cells = <1>;
+ io_domains: io-domains {
+ compatible = "rockchip,rv1108-io-voltage-domain";
+ status = "disabled";
+ };
+
u2phy: usb2phy@100 {
compatible = "rockchip,rv1108-usb2phy";
reg = <0x100 0x0c>;
@@ -434,8 +439,13 @@
};
pmugrf: syscon@20060000 {
- compatible = "rockchip,rv1108-pmugrf", "syscon";
+ compatible = "rockchip,rv1108-pmugrf", "syscon", "simple-mfd";
reg = <0x20060000 0x1000>;
+
+ pmu_io_domains: io-domains {
+ compatible = "rockchip,rv1108-pmu-io-voltage-domain";
+ status = "disabled";
+ };
};
usbgrf: syscon@202a0000 {
@@ -536,6 +546,17 @@
status = "disabled";
};
+ sfc: spi@301c0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x301c0000 0x4000>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+ clock-names = "clk_sfc", "hclk_sfc";
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
gmac: eth@30200000 {
compatible = "rockchip,rv1108-gmac";
reg = <0x30200000 0x10000>;
@@ -704,6 +725,32 @@
};
};
+ sfc {
+ sfc_bus4: sfc-bus4 {
+ rockchip,pins =
+ <2 RK_PA0 3 &pcfg_pull_none>,
+ <2 RK_PA1 3 &pcfg_pull_none>,
+ <2 RK_PA2 3 &pcfg_pull_none>,
+ <2 RK_PA3 3 &pcfg_pull_none>;
+ };
+
+ sfc_bus2: sfc-bus2 {
+ rockchip,pins =
+ <2 RK_PA0 3 &pcfg_pull_none>,
+ <2 RK_PA1 3 &pcfg_pull_none>;
+ };
+
+ sfc_cs0: sfc-cs0 {
+ rockchip,pins =
+ <2 RK_PB4 3 &pcfg_pull_none>;
+ };
+
+ sfc_clk: sfc-clk {
+ rockchip,pins =
+ <2 RK_PB7 2 &pcfg_pull_none>;
+ };
+ };
+
gmac {
rmii_pins: rmii-pins {
rockchip,pins = <1 RK_PC5 2 &pcfg_pull_none>,